EP20K200CF484I9N vs EP20K200CF484I9 Perbandingan

Perbandingan bersamaan detil EP20K200CF484I9N dari Altera dan EP20K200CF484I9 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP20K200CF484I9N EP20K200CF484I9
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family APEX 20KC APEX 20KC (APEX 20K with ESB/CAM)
Logic Elements / Cells 8,320 —
Maximum Gates 200,000 —
Maximum Internal Frequency 250 MHz —
Process Technology 0.15 µm CMOS 0.15 um CMOS
Core Supply Voltage 1.8 V nominal (1.71 V to 1.89 V) —
Paket 484-pin FBGA (PBGA484), 1.0 mm pitch 484-ball FineLine BGA (FBGA), 1.00 mm pitch
User I/O Count 376 (368 user I/O + 4 dedicated inputs) —
Speed Grade I9 (industrial, highest-performance bin) -9 (lowest speed in EP20K200 family)
Suhu Kerja [DATA_NEEDED: industrial temperature range -40C to +85C assumed for I-grade] —
Programmable I/O Standards LVTTL, LVCMOS, PCI —
Configuration Interface JTAG IEEE 1149.1, ByteBlaster/BitBlaster serial —
On-chip Memory Embedded System Blocks (ESBs) for distributed RAM/ROM —
Lead-Free (Pb-free) Yes (N suffix) —
Status RoHS Compliant unknown - confirm with supplier (legacy part)
Series — APEX 20KC
Typical Gates — 200,000
Logic Elements (Cells) — 8,320
Maximum User I/O — 376
Dedicated Inputs — 4
Total Terminals — 484 (balls)
Core Supply Voltage (VCCINT) — 1.8 V nominal (1.71 V to 1.89 V)
Operating Temperature Grade — Industrial (I)
Junction Temperature Range — -40 C to +100 C
Configuration Method — SRAM, JTAG in-system programmable
Lifecycle — Obsolete - EOL announced by Altera/Intel in 2008

Spek dan Sumber

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