EP20K400CF672C8ES vs EP20K200CF672C8ES Perbandingan

Perbandingan bersamaan detil EP20K400CF672C8ES dari Altera dan EP20K200CF672C8ES dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP20K400CF672C8ES EP20K200CF672C8ES
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20KC APEX 20K
Series EP20K400 —
Logic Cells / Macros 16,640 —
System Gates (typical) 400,000 —
System Gates (maximum) 212,992 [DATA_NEEDED: confirm datasheet interpretation] —
Maximum User I/O 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] —
Bidirectional I/O 484 —
Propagation Delay 2.5 ns —
Maximum Internal Frequency 301.21 MHz —
Process Technology 0.15 µm CMOS [DATA_NEEDED: process node]
Nominal Supply Voltage 1.8 V —
Supply Voltage Range 1.71 V to 1.89 V —
Suhu Kerja 0°C to 85°C (Commercial) 0C to +85C (commercial)
Paket 672-BGA FineLine (FC-FBGA / S-PBGA-B672) 672-ball FineLine BGA
Logic Family CMOS —
Architecture MultiCore™ (LUT + Embedded System Block) —
Programming Method JTAG / in-system via configuration memory —
Status RoHS [DATA_NEEDED: not stated in verified data] [DATA_NEEDED: rohs status]
Maximum Logic Elements — 8,320
Typical Gates — 200,000 system gates
Maximum User I/O Pins — 1,064
Embedded RAM Bits — 212,992 bits
Speed Grade — C8 (8 ns pin-to-pin)
Core Voltage — 1.8 V
Configuration Method — SRAM, requires external PROM
Tipe Mounting — Surface Mount (BGA)
Status Suffix — ES (Engineering Sample)
I/O Standards — LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL
Logic Element Architecture — 4-input LUT with dedicated carry/cascade
Embedded Memory Type — RAM / ROM / CAM blocks

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