EP2S60F484C4N vs EP2S60F484I5N Perbandingan

Perbandingan bersamaan detil EP2S60F484C4N dari Intel dan EP2S60F484I5N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP2S60F484C4N EP2S60F484I5N
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Series Stratix II Stratix II (EP2S60)
Family Stratix II FPGA Field Programmable Gate Array (FPGA)
Logic Elements (LE) 60,440 60,440
Adaptive Logic Modules (ALM) 30,220 24,176
Embedded Memory (Bits) 2,544,192 —
DSP Blocks (18x18 Multipliers) 36 —
Maximum User I/O 334 —
User I/O Banks [DATA_NEEDED: User I/O Banks] —
PLLs Up to 12 12 (4 enhanced + 8 fast)
Process Technology 90 nm CMOS 90 nm CMOS
Core Supply Voltage 1.2 V 1.2 V typical
Maximum Internal Clock Frequency 711.24 MHz —
Paket 484-Ball FBGA (FineLine BGA) 484-ball FC-FBGA (Flip-Chip Fine-pitch BGA), 1.00 mm pitch
Tipe Mounting Surface Mount Surface Mount (BGA)
Operating Temperature Grade Commercial (C4) —
Configuration Modes Passive Serial, Fast Passive Parallel, JTAG —
Status RoHS [DATA_NEEDED: RoHS Status] [DATA_NEEDED: rohs status not stated in verified data]
Lead-Free [DATA_NEEDED: Lead-Free] —
Embedded Memory (bits) — 2,544,192
Embedded Memory (M512/M4K/M-RAM blocks) — M512: 330, M4K: 255, M-RAM: 2
DSP Blocks (18-bit multipliers) — 48 blocks (192 18x18 multipliers)
Maximum User I/O Pins — 334
Maximum Fabric Clock — 609.76 MHz
Speed Grade — I5 (industrial, slow-speed for low power)
Rentang Suhu Kerja — -40 °C to +100 °C (industrial)
Lead-Free / Halogen-Free — [DATA_NEEDED: lead-free / halogen-free status]
Configuration Interface — JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel
Design Tool — Quartus II (legacy; current Intel Quartus Prime with Stratix II device support)

Spek dan Sumber

Buka Semua Produk Buat BOM Ajukan Diskon