EP2S90F1020I4GA vs EP2S90F1020C3N Perbandingan
Perbandingan bersamaan detil EP2S90F1020I4GA dari Intel dan EP2S90F1020C3N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Intel
EP2S90F1020I4GA - 90K LEs Stratix II FPGA, 758 I/O FBGA-1020 | Intel
EP2S90F1020I4GA ⚠ Waktu Beli TerakhirAltera
EP2S90F1020C3N - 90nm Stratix II FPGA 90,960 LEs FC-FBGA-1020 | Altera
EP2S90F1020C3N ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EP2S90F1020I4GA | EP2S90F1020C3N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Waktu Pembelian Terakhir | Waktu Pembelian Terakhir |
| Family | Stratix II | Stratix II (EP2S90) |
| Logic Elements (LEs) | 90,960 | — |
| Embedded Memory | 4,520,488 bits (approximately 4.4 Mbit) | — |
| Embedded 18x18 Multipliers | 192 | — |
| Maximum User I/O | 758 | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Paket | 1020-ball FC-FBGA | — |
| Suhu Kerja | -40C to +100C (industrial) | 0C to +85C (commercial grade) |
| Speed Grade | I4 (mid-performance, industrial) | C3 (commercial, slowest) |
| Supply Voltage - Core (VCCINT) | 1.2 V nominal | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| PLLs | 4 enhanced PLLs | — |
| External Memory Support | DDR, DDR2, QDRII, SDR | — |
| Tipe Mounting | Surface Mount | Surface Mount |
| Status RoHS | Compliant | Compliant |
| Program Memory Type | SRAM (volatile, requires configuration device) | — |
| Series | — | Stratix II |
| Logic Elements | — | 90,960 |
| LABs (Logic Array Blocks) | — | 4,548 |
| Total RAM Bits | — | 4,520,488 |
| User I/O Count | — | 758 |
| Supply Voltage - Core | — | 1.15 V to 1.25 V (1.2 V nominal) |
| Paket / Case | — | 1020-BBGA, FC-FBGA |
| Supplier Device Package | — | 1020-FBGA (33 x 33 mm) |
| DSP Block Count | — | [DATA_NEEDED: 18x18 multiplier count] |
| Embedded Transceivers | — | [DATA_NEEDED: number of high-speed transceivers] |
| Maximum User I/O Frequency | — | [DATA_NEEDED: LVDS / DDR max rate] |
| Level MSL | — | 3 (per JEDEC J-STD-020) |
| Programming Tool | — | Altera Quartus II |