EP2SGX90FF40C3NES vs EP2SGX90FF40C4NES Perbandingan
Perbandingan bersamaan detil EP2SGX90FF40C3NES dari Intel dan EP2SGX90FF40C4NES dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Intel
EP2SGX90FF40C3NES - Stratix II GX FPGA 90K LE FC-FBGA | Intel
EP2SGX90FF40C3NES ⚠ Waktu Beli TerakhirIntel
EP2SGX90FF40C4NES - Stratix II GX FPGA, 90k LE, 6.375Gbps | Intel (Altera)
EP2SGX90FF40C4NES NrndPerbandingan Spesifikasi
| Parameter Umum | EP2SGX90FF40C3NES | EP2SGX90FF40C4NES |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Waktu Pembelian Terakhir | NRND |
| Family | Stratix II GX | Stratix II GX |
| Series | EP2SGX90 | — |
| Logic Elements | 90,960 | 90,960 |
| Logic Array Blocks (LABs) / CLBs | 4,828 | — |
| Maximum Internal Frequency | 816.9 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Supply Voltage | 1.2 V | — |
| Transceivers | Up to 12 (SerDes, up to 6.375 Gbps) | — |
| Hard IP | PCI Express, 10G Ethernet, TriMatrix memory, DSP blocks | — |
| Paket | 1508-pin FC-FBGA (FF1508) | 1508-pin FC-FBGA |
| Package Code | BGA | — |
| Package Shape | Square | — |
| Number of Terminals | 1508 (ball) | — |
| Operating Temperature (Commercial Extended) | 0 C to 85 C | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Tipe Mounting | Surface Mount | Surface Mount (BGA) |
| Level MSL | [DATA_NEEDED: MSL rating] | — |
| Logic Array Blocks (LABs) | — | 4,828 |
| Core Voltage | — | 1.2 V |
| Maximum Transceiver Data Rate | — | 6.375 Gbps per channel |
| Number of Transceiver Channels | — | Up to 20 (device-dependent) |
| Embedded Memory | — | TriMatrix memory (M512/M4K/M-RAM blocks) |
| DSP Blocks | — | Yes (dedicated multipliers/accumulator blocks) |
| Operating Temperature Grade | — | Commercial Extended |
| Configuration Method | — | JTAG, Active Serial, Active Parallel |
| PLLs | — | Yes (multiple with deterministic latency) |