EP910DC-15 vs EP910ILI-25 Perbandingan

Perbandingan bersamaan detil EP910DC-15 dari Altera dan EP910ILI-25 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP910DC-15 EP910ILI-25
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Altera Classic EPLD —
Device Density 900 usable gates —
Macrocells 24 24
Logic Elements [DATA_NEEDED: exact LE count] —
Dedicated Inputs 12 12
Bidirectional I/O Pins 12 —
Flip-Flops 10 —
Product Terms per Macrocells 24 —
Maximum Propagation Delay (tPD) 15 ns —
Speed Grade 15 —
Supply Voltage (VCC) 5 V (typical) —
Suhu Kerja 0C to +70C (commercial) -40C to +85C (Industrial)
Technology CMOS EPROM, UV-erasable CMOS, EPROM
Paket 24-pin ceramic DIP (DC) PLCC-44 (windowed ceramic, J-lead)
Tipe Mounting Through-Hole —
Level MSL [DATA_NEEDED: MSL level] —
Status RoHS [DATA_NEEDED: not explicitly stated in verified data] Non-compliant (windowed ceramic package)
Product Type — EPLD (Erasable Programmable Logic Device)
Series — EP910 (Classic EPLD)
I/O Pins — 24
Product Terms — 240 (maximum)
Propagation Delay (tPD) — 25 ns
Architecture — PAL-type with global interconnect bus
Operating Voltage — 5 V (4.75 V to 5.25 V)
Programming Method — UV-erasable (windowed), MAX+PLUS II programmer
Logic Test Circuitry — On-board JTAG-compatible test

Spek dan Sumber

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