EPC2TC32-U-CAF48 vs EPC2TC32U Perbandingan

Perbandingan bersamaan detil EPC2TC32-U-CAF48 dari Altera dan EPC2TC32U dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC2TC32-U-CAF48 EPC2TC32U
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif NRND
Ukuran Memori 1.6 Mb 1.6 Mbit
Fungsi In-system programmable configuration PROM Serial Configuration Device for SRAM-based LUT FPGAs
Tegangan Pemuat 3.3 V 3.0 V to 3.6 V or 4.75 V to 5.25 V
Antarmuka Serial synchronous (Altera FPGA configuration) —
Programming Interface IEEE 1149.1 JTAG —
Control Pins OE, nCS, DCLK —
Cascadable Yes (DATA output supports daisy-chain) —
Storage Technology EPROM —
Paket 32-TQFP (7x7 mm) 32-pin QFP (CAF48, lead-free)
Tipe Mounting Surface Mount Surface Mount
Suhu Kerja -40C to +85C (industrial, per data sheet) -40 C to +85 C
Jumlah Pin 32 —
DC Input Min -0.3 V —
DC Input Overshoot 7.0 V for <100 mA, <20 ns —
DC Input Undershoot -2.0 V for <100 mA, <20 ns —
Status RoHS [DATA_NEEDED: RoHS status] Compliant (lead-free / RoHS per distributor data)
Lead-Free [DATA_NEEDED: lead-free status] —
Configuration Interface — Altera Passive Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
JTAG Support — Yes (IEEE 1149.1 boundary-scan, ISP)
Level MSL — [DATA_NEEDED: MSL level]
Lead-Free Finish — Yes (U suffix)
Supported FPGA Families — Altera Stratix, Cyclone, APEX, ACEX, Mercury, Excalibur
Configuration Mode — Passive Serial (PS), JTAG
Configuration Time — [DATA_NEEDED: typical configuration time]
Programming Cycles — [DATA_NEEDED: minimum program/erase cycles]
Data Retention — [DATA_NEEDED: minimum data retention years]

Spek dan Sumber

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