EPF8820ARI208-3N vs EPF8820ARI208-2N Perbandingan
Perbandingan bersamaan detil EPF8820ARI208-3N dari Intel dan EPF8820ARI208-2N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Intel
EPF8820ARI208-3N - 672 LEs FLEX 8000 FPGA, 208-PQFP | Intel / Altera
EPF8820ARI208-3N Obsolete
Perbandingan Spesifikasi
| Parameter Umum | EPF8820ARI208-3N | EPF8820ARI208-2N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Family | FLEX 8000 | FLEX 8000 |
| Device Sub-family | EPF8820A | — |
| Logic Elements (LEs) | 672 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Dedicated Flip-Flops | 672 | — |
| Maximum Usable Gates | up to 50,000 (device-dependent, [DATA_NEEDED: exact EPF8820A gate count]) | — |
| Embedded RAM Bits | [DATA_NEEDED: exact embedded RAM size for EPF8820A] | — |
| Paket | 208-pin PQFP / RQFP (gull-wing) | 208-pin RQFP (Plastic Quad Flat Pack) |
| Terminal Form | GULL WING | — |
| Package Code (per Corphita) | HFQFP | — |
| Operating Temperature Grade | Industrial (-40C to +85C) | — |
| Process Technology | CMOS (SRAM-based configuration) | — |
| I/O Voltage Tolerance | 3.3V or 5V configurable | — |
| Configuration Method | Serial (PS / passive serial) or ByteBlaster JTAG | Passive serial / JTAG / Altera EPC configuration device |
| Number of Terminals | 208 | — |
| Tipe Mounting | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: lead-free finish 'N' suffix indicates yes, but RoHS doc not retrieved] | [DATA_NEEDED: RoHS compliance per specific date code] |
| Usable Gates | — | 8,820 |
| Logic Elements | — | 504 |
| Maximum User I/O | — | 78 |
| LABs (Logic Array Blocks) | — | 63 |
| Logic Elements per LAB | — | 8 |
| Speed Grade | — | -2 (mid-tier) |
| Core Supply Voltage | — | 5.0 V |
| Suhu Kerja | — | 0C to +70C (commercial) / -40C to +85C (industrial) |
| Programming Technology | — | SRAM (volatile, requires configuration device) |
| Boundary Scan | — | IEEE 1149.1 (JTAG) compliant |
| Lead-Free | — | Yes (N suffix indicates lead-free assembly) |