EPM3064ATC100-10N vs EPM3128ATC144-5N Perbandingan
Perbandingan bersamaan detil EPM3064ATC100-10N dari Altera dan EPM3128ATC144-5N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EPM3128ATC144-5N - MAX 3000A 128-Macro 5ns CPLD | Altera
EPM3128ATC144-5N ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EPM3064ATC100-10N | EPM3128ATC144-5N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Waktu Pembelian Terakhir |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macrocells | 64 | 128 |
| Logic Array Blocks (LABs) | 2 | — |
| Maximum User I/O Pins | 66 | — |
| Usable Gates | 1,250 | 2500 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | — |
| In-System Programmability | Yes - IEEE Std. 1149.1 JTAG, IEEE Std. 1532 | Yes (3.3-V via JTAG) |
| Boundary-Scan Test (BST) | Yes - JTAG compliant | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Program/Erase Cycles | 100 minimum | — |
| MultiVolt I/O | Yes - 1.8 V / 2.5 V / 3.3 V / 5 V tolerant | — |
| Suhu Kerja | 0C to +70C (commercial) | 0C to 70C (Commercial) |
| Paket | 100-pin TQFP | 144-pin TQFP (20x20 mm) |
| Tipe Mounting | Surface Mount | Surface Mount |
| Status RoHS | Compliant (lead-free) | Compliant (lead-free) |
| Logic Family | — | CMOS |
| User I/O | — | 96 |
| Pin-to-Pin Logic Delay | — | 5 ns |
| Counter Frequency | — | up to 227.3 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Levels Supported | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| JTAG Boundary Scan | — | IEEE Std 1149.1 compliant |