EPM3128ATC144-5N vs EPM3128ATC144-10 Perbandingan

Perbandingan bersamaan detil EPM3128ATC144-5N dari Altera dan EPM3128ATC144-10 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Altera
EPM3128ATC144-5N EPM3128ATC144-5N - MAX 3000A 128-Macro 5ns CPLD | Altera

EPM3128ATC144-5N - MAX 3000A 128-Macro 5ns CPLD | Altera

EPM3128ATC144-5N ⚠ Waktu Beli Terakhir

Perbandingan Spesifikasi

Parameter Umum EPM3128ATC144-5N EPM3128ATC144-10
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Waktu Pembelian Terakhir Aktif
Family MAX 3000A MAX 3000A
Device Type CPLD - Complex Programmable Logic Device CPLD (Complex Programmable Logic Device)
Logic Family CMOS —
Macrocells 128 —
Usable Gates 2500 2,500 (typical)
User I/O 96 —
Pin-to-Pin Logic Delay 5 ns —
Counter Frequency up to 227.3 MHz —
Supply Voltage (Core) 3.3 V —
I/O Logic Levels Supported 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
In-System Programmability Yes (3.3-V via JTAG) IEEE Std. 1532 compliant
JTAG Boundary Scan IEEE Std 1149.1 compliant —
Paket 144-pin TQFP (20x20 mm) 144-pin TQFP (TQ144)
Suhu Kerja 0C to 70C (Commercial) 0C to +70C (commercial)
Status RoHS Compliant (lead-free) Compliant
Tipe Mounting Surface Mount Surface Mount
Macro Cells — 128
User I/Os — 96
Logic Elements / LABs — 4 Logic Array Blocks
Propagation Delay (tPD) — 10 ns (speed grade -10)
Counter Frequency (fCNT) — Up to 227.3 MHz
Supply Voltage (VCCINT) — 3.3 V
MultiVolt I/O Interface — 1.5V / 1.8V / 2.5V / 3.3V
Boundary-Scan Test — IEEE Std. 1149.1 (JTAG)
Configuration Memory — EEPROM (non-volatile, instant-on)
Lead-Free — Yes

Spek dan Sumber

Buka Semua Produk Buat BOM Ajukan Diskon