EPM3512AFC256-2 vs EPM3512AFC256-10 Perbandingan
Perbandingan bersamaan detil EPM3512AFC256-2 dari Altera dan EPM3512AFC256-10 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM3512AFC256-2 | EPM3512AFC256-10 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | 212 | — |
| Propagation Delay (tPD, -2 grade) | [DATA_NEEDED: tPD ns] | — |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX MHz] | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Output Drive Voltage | 2.5 V or 3.3 V (MultiVolt) | — |
| Input Tolerance | 2.5 V, 3.3 V, 5.0 V tolerant | — |
| Paket | BGA-256 (FineLine BGA) | 256-pin FBGA |
| Ball Pitch | 1.0 mm | — |
| Programming Interface | JTAG (IEEE Std 1149.1) / ByteBlaster | — |
| Process Technology | 0.30 um CMOS EEPROM | — |
| Suhu Kerja | 0C to +70C (commercial) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Speed Grade | -2 | — |
| Usable Gates | — | 10,000 |
| Maximum I/O Pins | — | 208 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 87 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5-V tolerant |
| Programmable Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) |
| Rentang Suhu Kerja | — | [DATA_NEEDED: industrial/commercial operating temperature range] |
| Jumlah Pin | — | 256 |
| Tipe Mounting | — | Surface Mount |
| Architecture | — | MAX (Multiple Array matriX) EEPROM-based |