EPM3512AFI256-10 vs EPM3512AQC210-10 Perbandingan
Perbandingan bersamaan detil EPM3512AFI256-10 dari Intel dan EPM3512AQC210-10 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM3512AFI256-10 | EPM3512AQC210-10 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | NRND |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Equivalent Gates | 10,000 | — |
| Macrocells | 512 | — |
| User I/Os | 208 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.5 ns | — |
| Maximum Counter Frequency | 227.3 MHz | — |
| Propagation Delay | 7.5 ns (max, per chipdig summary) | — |
| Core Voltage | 3.3 V | — |
| MultiVolt I/O Levels | 5.0 V / 3.3 V / 2.5 V | — |
| Process Technology | CMOS EEPROM | — |
| In-System Programmability | Yes, IEEE Std. 1532 (3.3 V ISP) | — |
| Paket | FBGA-256 (FineLine BGA, 256 balls) | PQFP-210 |
| Suhu Kerja | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Logic Family | CMOS | — |
| Status RoHS | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: rohs_compliance_status] |
| Tegangan Pemuat | 3.3 V (core); MultiVolt I/O to 5.0 V | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Macrocells | — | 512 |
| Logic Array Blocks (LABs) | — | 16 (32 macrocells each) |
| Maximum User I/O Pins | — | 172 |
| Speed Grade | — | -10 (10 ns tPD) |
| Pin-to-Pin Propagation Delay (tPD1, max) | — | 10 ns |
| Maximum Operating Frequency (fCNT) | — | 125 MHz |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| Supply Voltage - I/O (VCCIO) | — | 3.3 V or 2.5 V |
| Input Voltage Tolerance | — | 5.0 V tolerant |
| Programmable Technology | — | EEPROM (in-system programmable) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Tipe Mounting | — | Surface Mount |