EPM7128AETC144-7 vs EPM7128AETI144-10N Perbandingan
Perbandingan bersamaan detil EPM7128AETC144-7 dari Intel dan EPM7128AETI144-10N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EPM7128AETI144-10N - MAX 7000A CPLD, 128 Macrocells, TQFP-144 | Altera
EPM7128AETI144-10N ObsoletePerbandingan Spesifikasi
| Parameter Umum | EPM7128AETC144-7 | EPM7128AETI144-10N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Series | MAX 7000A | — |
| Programmable Type | In-System Programmable (ISP), EEPROM | — |
| Number of Macrocells | 128 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Number of Usable Gates | 2,500 | — |
| Number of I/Os | 100 | — |
| Propagation Delay (tPD) Max | 7.5 ns | — |
| Maximum Operating Frequency | 129.9 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | 3.0 V to 3.6 V (3.3 V nominal) |
| I/O Voltage (MultiVolt) | 2.5 V / 3.3 V / 5.0 V tolerant | — |
| Suhu Kerja | 0C to +70C (Commercial) | -40C to +85C (industrial) |
| Paket | 144-pin TQFP (20x20 mm) | TQFP-144 (144-pin) |
| Tipe Mounting | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG (ByteBlaster / USB-Blaster) | — |
| Configuration Memory | EEPROM, non-volatile | — |
| ISP Endurance | 100 cycles typical per macrocell | — |
| Process Technology | CMOS | 0.35 µm CMOS EEPROM |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Family | — | MAX 7000A |
| Macrocells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 |
| Maximum User I/O Pins | — | 100 |
| Propagation Delay (tPD) | — | 10 ns |
| Programming Technology | — | EEPROM (in-system programmable) |
| JTAG Interface | — | IEEE Std 1149.1 BST compliant |
| Level MSL | — | 3 |
| Speed Grade | — | -10 (10 ns tPD) |
| Operating Frequency (fCNT) | — | [DATA_NEEDED: fCNT counter frequency] |