EPM7160ELC84-15 vs EPM7160SLC84-15 Perbandingan
Perbandingan bersamaan detil EPM7160ELC84-15 dari Intel dan EPM7160SLC84-15 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM7160ELC84-15 | EPM7160SLC84-15 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000 |
| Product Type | CPLD - Complex Programmable Logic Device | — |
| Architecture | EEPROM-based, second-generation MAX | — |
| Usable Gates | 3,200 | 3,200 |
| Macrocells | 160 | 160 |
| Logic Array Blocks | 4 | — |
| Maximum I/O Pins | 36 | — |
| Pin-to-Pin Delay | 15 ns | — |
| Counter Frequency | 76.9 MHz | — |
| Supply Voltage (Vcc) | 5 V | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Package Type | 84-pin PLCC (J-Lead) | PLCC-84 (PQCC84, JEDEC S-PQCC-J84) |
| Tipe Mounting | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket or direct solder) |
| Suhu Kerja | 0 C to +70 C (commercial) | 0 C to 70 C |
| Status RoHS | Contains lead / RoHS non-compliant (per Altera listing) | Not RoHS compliant (contains lead, SnPb finish typical) |
| Maximum Propagation Delay | — | 15 ns |
| Maximum User I/O Pins | — | 64 |
| Supply Voltage (VCCINT/VCIO) | — | 4.75 V to 5.25 V (5 V nominal) |
| I/O Logic Level | — | Configurable 3.3 V or 5 V |
| Technology | — | CMOS, EEPROM configuration |
| Terminal Pitch | — | 1.270 mm |
| Programming Interface | — | JTAG (IEEE 1149.1) in-system programmable |
| Lifecycle | — | Obsolete / last-time-buy (per Altera/Intel PDN) |