EPM7160STC100-10 vs EPM7160STI100-10 Perbandingan

Perbandingan bersamaan detil EPM7160STC100-10 dari Intel dan EPM7160STI100-10 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Intel
EPM7160STC100-10 EPM7160STC100-10 - MAX 7000S CPLD, 160 Macrocells, 100-pin TQFP | Intel

EPM7160STC100-10 - MAX 7000S CPLD, 160 Macrocells, 100-pin TQFP | Intel

EPM7160STC100-10 ⚠ Waktu Beli Terakhir

Perbandingan Spesifikasi

Parameter Umum EPM7160STC100-10 EPM7160STI100-10
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Waktu Pembelian Terakhir Obsolete
Family MAX 7000S MAX 7000S
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 160 —
User I/Os 84 84
Usable Gates 3,200 3,200
Logic Elements 160 macrocells / 10 Logic Array Blocks —
Supply Voltage (VCC) 5.0 V (4.75 V - 5.25 V) —
Propagation Delay (tPD1) 10 ns —
Global Clock Setup Time 6 ns —
Internal Counter Frequency 100 MHz —
Technology CMOS, EEPROM-based —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Paket 100-pin TQFP TQFP-100 (100-pin Thin Quad Flat Pack)
Suhu Kerja 0 C to +70 C (commercial) -40 C to +85 C (Industrial)
Tipe Mounting Surface Mount Surface Mount
Status RoHS Non-RoHS (legacy Altera part; -10N variant is RoHS) [DATA_NEEDED: RoHS status - not explicitly stated in provided data]
Macrocells — 160
Logic Elements / Blocks — 16 Logic Array Blocks (LABs)
Propagation Delay (tPD) — 10 ns
Maximum Operating Frequency — 100 MHz
Internal Supply Voltage — 4.75 V to 5.25 V
I/O Supply Voltage — 5.0 V
Programmable Type — In-System Programmable (EEPROM)
JTAG / Boundary Scan — IEEE Std. 1149.1 compliant
PCI Compliance — PCI Local Bus Specification Rev. 2.2 (for -10 speed grade)
Level MSL — [DATA_NEEDED: MSL rating]
Lead-Free — [DATA_NEEDED: lead-free status]

Spek dan Sumber

Buka Semua Produk Buat BOM Ajukan Diskon