EPM9320ARC208-10 vs EPM9320RC208-10 Perbandingan
Perbandingan bersamaan detil EPM9320ARC208-10 dari Altera dan EPM9320RC208-10 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera
EPM9320ARC208-10 ⚠ Waktu Beli Terakhir
Perbandingan Spesifikasi
| Parameter Umum | EPM9320ARC208-10 | EPM9320RC208-10 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Waktu Pembelian Terakhir | NRND |
| Device Family | MAX 9000 | — |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 320 | 320 |
| Usable Gates | 6,000 | 6,000 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Frequency | 144.9 MHz | — |
| Tegangan Pemuat | 5.0 V | 5 V |
| Logic Blocks (LABs) | 16 | — |
| Programmability | EEPROM, in-system programmable via JTAG | — |
| JTAG Support | IEEE Std. 1149.1 compliant | — |
| Speed/Power Optimization | Per-macrocell programmable, 50% power mode available | — |
| Paket | RQFP-208 (Power Quad Flat Pack) | 208-pin RQFP (RC) |
| Tipe Mounting | Surface Mount | — |
| Suhu Kerja | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) - 'C' suffix |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | ROHS3 Compliant (per fpgalink listing) |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Speed Grade | — | -10 |
| Programming Interface | — | JTAG (ByteBlaster/BitBlaster) |
| Non-volatile Configuration | — | Yes (EPROM/EEPROM based) |
| Design Tool Support | — | MAX+PLUS II, Quartus (legacy) |
| Tingkat Sensitivitas Kekeringan (MSL) | — | 3 (168 Hours) |
| Lead Time | — | 1-7 days (per fpgalink listing) |