XC6SLX45-3FGG484I vs XC6SLX45-2FGG484I Perbandingan
Perbandingan bersamaan detil XC6SLX45-3FGG484I dari AMD dan XC6SLX45-2FGG484I dari AMD. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | XC6SLX45-3FGG484I | XC6SLX45-2FGG484I |
|---|---|---|
| Merek | AMD | AMD |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Unknown | Aktif |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| FPGA Family | Spartan-6 LX | — |
| Logic Cells | 43,661 cells | 43,661 |
| Adaptive Logic Modules | 6,822 ALMs | — |
| Configurable Logic Blocks | 3,411 CLBs | — |
| Internal Frequency | 500 MHz | — |
| Maximum Operating Frequency | 862 MHz | — |
| Input and Output Count | 316 I/O | — |
| Package Type | 484-BBGA | — |
| Package Body Size | 15 mm x 15 mm | — |
| Ball Pitch | 0.80 mm | — |
| Process Technology | 45 nm CMOS | 45 nm low-power CMOS |
| Speed Grade | -3 | -2 |
| Temperature Grade | I (industrial) | — |
| Suhu Kerja | 0°C to 85°C | — |
| Lead-Free Status | Lead-free package | — |
| Board Construction Reference | MO-275 | — |
| Tipe Mounting | Surface mount | — |
| RoHS Compliance | [DATA_NEEDED: RoHS compliance status] | Lead-free / RoHS compliant |
| REACH Compliance | [DATA_NEEDED: REACH compliance status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification status] | — |
| Family | — | Spartan-6 LX |
| Logic Slices | — | 6,822 |
| Flip-Flops | — | 54,576 |
| Block RAM | — | 2,138,112 bits (2,088 Kb/s) |
| DSP Slices (DSP48A1) | — | 58 |
| Maximum User I/O | — | 316 |
| Paket | — | 484-ball BGA (FBGA-484) |
| Package Dimensions | — | 23 x 23 mm, 1.0 mm ball pitch |
| Operating Temperature (I grade) | — | -40C to +100C (industrial) |
| Supply Voltage Core | — | 1.2 V typical |
| Clock Management Tiles | — | 6 CMT (4 DCM + 2 PLL) |
| Maximum I/O Speed | — | 800 Mbps LVDS |
| Memory Interface Support | — | DDR, DDR2, DDR3, LPDDR |
| Configuration Memory | — | AES-256 bitstream encryption |