CXMTが2026年末に向けて4F2 DDR5 RDIMMを推進:Samsungの2028年目標を2年先行

CXMTは2026年末までの4F2セルDDR5 RDIMM投入を計画しており、Samsungの2028年量産開始時期とされる時期を先行します。歩留まり、EUVアクセス、サーバー認定は未解決の課題です。

公開日 更新日 5 分で読了 ✓ AI対応 共有

TL;DR — 3つの文

  • CXMT's Cao Kanyu announced a DDR5 RDIMM with a 4F2 cell architecture, targeting a server launch by end of 2026 (S1).
  • Samsung is reported to target 4F2 mass production in 2028, putting CXMT's deadline roughly two years ahead (S1).
  • The 6F2 to 4F2 cell change cuts cell area by ~33% in theory, but CXMT has not disclosed module specifications or yields (S1).

引用元: key_takeaways (実フィールド、最大3件)。事実と分析は別々にラベル付けされています。

CXMTが2026年末に向けて4F2 DDR5 RDIMMを推進:Samsungの2028年目標を2年先行Editorial cover for a component sourcing brief. Chip motif; headline "CXMTが2026年末に向けて4F2 DDR5 RDIMMを推進:Samsungの2028年目標を2年先行". No reported key numbers on this brief, so no number strip is drawn. 1 cited source. Static cover (no animation).CXMTが2026年末に向けて4F2 DDR5RDIMMを推進:Samsungの2028年目標を2年先行XAIPART
Cover image generated from data already shown on this page: the category motif, the headline, and reported key numbers. No decorative illustration; no third-party image.

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Reported by Asia Daily on 2026-10-12. Summarized and analyzed by XAIPART Editorial.

What happened

Speaking at a Shanghai conference on , CXMT's Cao Kanyu said the company will "launch next-generation DDR5 RDIMM server memory incorporating a 4F2 DRAM structure by the end of the year."S1 The announcement targets enterprise customers rather than the consumer devices where Chinese DRAM suppliers already have a presence, and it does not redefine the DDR5 standard itself.S1

The proposed 4F2 cell shrinks the cell footprint from six square feature-size units to four, a theoretical ~33% reduction in cell area, which could in principle fit ~50% more cells into the same space, though the source stresses that finished-module capacity, speed and power depend on peripheral circuitry, manufacturing results and other design factors.S1 CXMT also says it redesigned key manufacturing steps and developed its own vertical surrounding gate transistor (VSG), and is exploring hybrid bonding for memory and logic.S1

The CXMT deadline precedes Samsung's reported 2028 mass-production target by roughly two years: Samsung is reported to plan to complete development of its 10a DRAM using 4F2 in 2026, run quality testing in 2027 and start mass production in 2028.S1 SK hynix disclosed a related technology roadmap in 2025, and CXMT's September 2026 fifth-generation platform entered mass production, a milestone distinct from the 4F2 server product.S1

CXMT says it has published more than 300 patent families related to 4F2 and has researched the architecture since 2016, and Cao claims CXMT's related patent holdings exceed those of domestic and international competitors.S1 The source notes that CXMT cannot use ASML EUV lithography equipment, which adds uncertainty to its yield ramp.S1

MetricReported valueSource
CXMT 4F2 DDR5 RDIMM targetLaunch by end of 2026[S1]
Samsung 4F2 mass-production target2028[S1]
Cell-area reduction (6F2 to 4F2)~33%[S1]
CXMT 4F2-related patent familiesMore than 300[S1]
CXMT July share saleAbout $8.6 billion (~66.61 billion yuan); 466% first-day share move[S1]
Micron stock move on announcementAbout -1% overnight[S1]
SK hynix stock move on announcementAbout -0.8% local trading[S1]
Detailed module specificationsNot disclosed[S1]
Production yields, volumes, qualification statusNot disclosed[S1]

Background timeline

  1. - CXMT says it began researching 4F2 when the company was founded.S1
  2. - SK hynix disclosed a roadmap related to 4F2 technology.S1
  3. - CXMT says it began mass production of LPDDR6 mobile memory.S1
  4. - CXMT says its fifth generation DRAM manufacturing platform entered mass production.S1
  5. - Cao Kanyu presented the server memory plan in Shanghai.S1
  6. - CXMT targets introduction of DDR5 RDIMMs using 4F2.S1
  7. - Samsung reportedly plans quality testing of its 10a 4F2 DRAM.S1
  8. - Samsung reportedly plans mass production of its 10a 4F2 DRAM.S1

XAIPART take

Technical impact

A 4F2 layout is a structural change rather than a DDR5 standard change: JEDEC DDR5 signaling, ranks, and module pinout would still apply, so BIOS/firmware and platform validation paths used today with Samsung, SK hynix and Micron RDIMMs should remain usable if CXMT's parts meet JEDEC compliance. XAIPART analysis

The reported combination of a vertical surrounding gate transistor and hybrid bonding is closer to a multi-year process roadmap than a single product drop; the end-2026 commitment is a launch window, not a confirmed high-yield ramp, and CXMT's EUV restriction will push the company toward multi-patterning DUV and self-aligned approaches that historically cap density and pitch more aggressively than EUV-based flows. XAIPART analysis

Market impact

Even with a 4F2 density claim, server procurement decisions are typically driven by validated reliability, sustained supply and total cost; until CXMT publishes module-level specifications, capacity figures and at least one named OEM qualification, designers and buyers should treat the end-2026 target as a possible option for second-source planning rather than a drop-in alternative to incumbent server DDR5 RDIMMs. XAIPART analysis

For incumbent supply, Samsung's 2027 test / 2028 mass-production timeline means SK hynix and Micron remain the only qualified high-density server DDR5 suppliers through at least 2027, so lead times for high-density 96 GB / 128 GB / 256 GB RDIMMs are unlikely to ease from CXMT's announcement alone, and the modest single-digit-percent moves in Micron and SK hynix shares on the news support that read. XAIPART analysis

Action

Add CXMT 4F2 DDR5 RDIMMs to second-source evaluations only after the source publishes module datasheets and at least one customer reference; keep incumbent RDIMM POs running until JEDEC compliance and qualification evidence is in hand. XAIPART analysis

Track CXMT disclosures against the four open items the source flags (module specifications, production scale, customer qualification, reliable operation) before re-pricing any 2027 server memory BOM; if none are published by end of Q1 2027, treat the end-2026 launch as marketing rather than a usable supply event. XAIPART analysis

XAIPART Forecast

XAIPART expects that, if CXMT has not published a server DDR5 RDIMM datasheet plus at least one named OEM or hyperscaler qualification by 2027-03-31, the end-2026 launch will not translate into measurable 2027 server DRAM market share; under that test this forecast is wrong if CXMT does publish both items on or before that date. XAIPART analysis

Facts are as reported by Asia Daily. The design-in, sourcing and forward-looking statements above are XAIPART's analysis, not the source's claims. Uncertainty: production yields, module specifications, qualification status, exact release date and CXMT's manufacturing scale are not disclosed by the source; the HBM gap to Korean suppliers is described only as "at least three years" via industry assessments, not measured tests.

Corrections: none at publication. This brief will be updated with a timestamp if the source corrects its report.

Dated developments, extracted from this page's timeline (curated milestones = hollow markers).
Timeline of dated developmentsDated entries: 2016-01-01 - CXMT says it began researching 4…; 2025-01-01 - SK hynix disclosed a roadmap rel…; 2026-08-01 2026 - CXMT says it began mass pro…; 2026-09-01 2026 - CXMT says its fifth generat…; 2026-10-10 10, 2026 - Cao Kanyu presented the…; 2026-12-31 of 2026 - CXMT targets introductio…; 2027-01-01 - Samsung reportedly plans quality…; 2028-01-01 - Samsung reportedly plans mass pr….2016-01-01- CXMT says it began researching 4…2025-01-01- SK hynix disclosed a roadmap rel…2026-08-012026 - CXMT says it began mass pro…2026-09-012026 - CXMT says its fifth generat…2026-10-1010, 2026 - Cao Kanyu presented the…2026-12-31of 2026 - CXMT targets introductio…2027-01-01- Samsung reportedly plans quality…2028-01-01- Samsung reportedly plans mass pr…

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XAIPART expects that, if CXMT has not published a server DDR5 RDIMM datasheet plus at least one named OEM or hyperscaler qualification by 2027-03-31, the end-2026 launch will not translate into measurable 2027 server ... CXMT does publish both items on or Pending

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次元別のコスト圧力

Source: FRED · Generated · reference output z and composite are algorithm outputs, not a fetch snapshot

Cost pressure by dimension — composite stateDiverging bars for three dimensions around a zero midpoint. Input Cost has no reading; Supply Demand z -1.4711, notable; Fx Energy z 0.2546, neutral. Composite index -9.1, band neutral.0Input costno readingSupply/demandz −1.4711 · notable46 dFX & energyz +0.2546 · neutral5 dcomposite −9.1 · neutral−100 · −40 · −15 · 0 · +15 · +40 · +100
Underlying values — copyable for verification.
DimensionFRED series IDUnitLagAs of
Input costPCOPPUSDM, PALUMUSDM, PNICKUSDMUSD/mt52 d
Supply/demandPCU334413334413, IPG3344Sindex(1982=100) / index(2017=100)46 d
FX & energyDEXCHUS, DCOILBRENTEU, DHHNGSPrate / USD/bbl / USD/MMBtu5 d

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Source fetched Asia Daily · asiadaily.org · 12,798 chars
Source sanity (S1) ok — passed before any model call (no s1_ block recorded)
Model / prompt MiniMax-M3 · prompt Blog Agent - News Summary (v2.8-final) · 9,189 tokens · 39.2s · run completed
Gate verdict hold · 6/6 applicable checks passed · spec v2.9 · C10 ratio 0.009979 · C10 rounds 0
Time contract 9 <time datetime> values in this brief — 0 violations (+08:00 or date-only)

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ゲートスコアの内訳 6 件の該当チェックのうち、 6項目合格: 100 %. Hold items: C13 (falsifiable forecast) — sent to human review. Gate spec: v2.9 (S0 + S1 + C1–C20) · Source affinity (C20): 0.9214. 該当するチェックに合格 6 / 6 = 100% · 判定: hold Hold items: C13 (falsifiable forecast) — sent to human review Gate spec: v2.9 (S0 + S1 + C1–C20) · Source affinity (C20): 0.9214 公開の可否はゲートが決定します。独立監査スコアは助言にすぎません。
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情報源

  1. CXMT targets a 4F2 server DDR5 RDIMM launch by end of 2026 as Samsung holds to 2028 — https://asiadaily.org/news/15007/ · rss · 参照日

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