NVIDIA pushes TSMC 3nm base dies for NVHBM across Samsung, SK hynix and Micron - what it means for AI accelerator BOMs

NVIDIA has asked all three HBM suppliers to use TSMC's 3nm for NVHBM base dies. TSMC flags tight 3nm capacity and adds a Tainan fab for 2028.

公開日 更新日 5 分で読了 ✓ AI対応 共有

TL;DR — 3つの文

  • NVIDIA has asked Samsung, SK hynix and Micron to adopt TSMC's 3nm process for NVHBM base dies, with Samsung's DS division reportedly agreeing. [S1]
  • Industry estimates cited by the source put TSMC 3nm yields above 90% versus about 60% for Samsung Foundry's SF2 node. [S1]
  • NVHBM is claimed to deliver up to 30% more memory bandwidth, 15% lower HBM power and 25% more XPU compute die area versus HBM4E. [S1]

引用元: key_takeaways （実フィールド、最大3件）。事実と分析は別々にラベル付けされています。

NVIDIA pushes TSMC 3nm base dies for NVHBM across Samsung, SK hynix and Micron - what it means for AI accelerator BOMsEditorial cover for a component sourcing brief. Memory motif; headline "NVIDIA pushes TSMC 3nm base dies for NVHBM across Samsung, SK hynix and Micron - wha…". Reported key numbers: 15 % lower; 25 % more; 33 %. 1 cited source. A one-time entrance animation stops under reduced motion.NVIDIA pushes TSMC 3nm base dies for NVHBMacross Samsung, SK hynix and Micron - wha…REPORTED KEY NUMBERS15 % lower25 % more33 %1 sourceXAIPART
Cover image generated from data already shown on this page: the category motif, the headline, and reported key numbers. No decorative illustration; no third-party image.

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Reported by TrendForce on . Summarized and analyzed by XAIPART Editorial.

What happened

According to Seoul Economic Daily, NVIDIA has asked Samsung, SK hynix and Micron to adopt TSMC's 3nm process for the base dies of its NVHBM memory, the custom HBM variant NVIDIA unveiled in August.S1 The push is intended to standardize production across suppliers so that end customers see consistent HBM performance and shorter product validation cycles.S1 Samsung's Device Solutions division reportedly signed off on the requirements after an internal review.S1

Industry estimates cited by Seoul Economic Daily put TSMC's 3nm yields above 90%, against roughly 60% for Samsung Foundry's 2nm (SF2) process, a gap that helps explain why NVIDIA is anchoring NVHBM base dies on TSMC's node.S1 NVIDIA has framed NVHBM's custom base die - which folds the memory controller usually located on the GPU into the HBM stack - as delivering up to 30% more memory bandwidth, 15% lower HBM power and 25% more XPU compute die area than standard HBM4E.S1

Samsung is hedging the dependency. The same Seoul Economic Daily report says Samsung is validating NVHBM base dies on its own 2nm process in case TSMC's 3nm lines become capacity-constrained.S1 For its in-house standard HBM4 (in mass production) and HBM4E (in validation), Samsung continues to use its own 4nm foundry node for base dies and 1c DRAM lines at Hwaseong and Pyeongtaek for core dies, and plans to keep a turnkey base-die path for custom HBM customers including AMD.S1

On the supply side, TSMC's October 15 earnings call flagged tight 3nm capacity; the node accounted for 33% of Q3 wafer revenue, its largest share of any process node.S1 Chairman and CEO C.C. Wei announced an additional 3nm fab in Tainan, on top of expansions already underway in Arizona, Kumamoto and Southern Taiwan Science Park, with mass production targeted for the first half of 2028.S1

Key numbers
MetricReported valueSource
TSMC 3nm yield estimateAbove 90%[S1]
Samsung SF2 (2nm) yield estimateAround 60%[S1]
NVHBM bandwidth uplift vs HBM4EUp to 30%[S1]
NVHBM power reduction vs HBM4E15% lower[S1]
NVHBM XPU compute die area gain vs HBM4E25% more[S1]
TSMC 3nm share of Q3 wafer sales33%[S1]
Additional Tainan 3nm fab mass productionFirst half of 2028[S1]
Samsung foundry nodes for standard HBM4/HBM4E base dies4nm[S1]

Background timeline

  1. - TSMC's earnings call flagged tight 3nm capacity, with the node contributing 33% of Q3 wafer revenue, and announced plans for an additional 3nm fab in Tainan targeting first-half 2028 mass production.S1
  2. - TrendForce reports NVIDIA has asked Samsung, SK hynix and Micron to use TSMC 3nm for NVHBM base dies; Samsung's DS division has agreed to the requirements.S1
  3. not disclosed - NVHBM was unveiled by NVIDIA in August (date and venue not stated by source).S1
  4. not disclosed - Samsung and TSMC first collaborated roughly four years ago on TSMC GPU packaging compatibility for HBM; the current tie-up is the first extending into HBM manufacturing proper.S1
  5. not disclosed - Samsung's HBM4 entered mass production earlier in 2026, with HBM4E now undergoing production validation, both using Samsung Foundry 4nm base dies and 1c DRAM core dies at Hwaseong and Pyeongtaek.S1

XAIPART take

Technical impact

Moving the memory controller into the NVHBM base die shifts a critical analog/mixed-signal block from the GPU die to the HBM stack, which is why NVIDIA needs an advanced logic node at the base. The reported TSMC 3nm yield gap (above 90% vs around 60% on Samsung SF2) is a real engineering reason to standardize on TSMC, not just a sourcing preference. XAIPART analysis: buyers should expect base-die and GPU-die thermal/mechanical co-design to become a first-order constraint on NVHBM-based accelerator layouts, since the controller now lives next to DRAM rather than under the heatsink.

Market impact

TSMC's 3nm node is already its largest revenue contributor at 33% of Q3 wafer sales, and NVHBM base dies add a third major demand pool alongside AI accelerators and smartphone SoCs. Samsung keeping SF2 in validation is a credible hedge if TSMC allocates 3nm preferentially to higher-margin GPU/SoC wafers. XAIPART analysis: HBM buyers should model a two-supplier scenario (TSMC-base + Samsung-2nm-base) once Samsung completes validation, because dual sourcing is likely to become a contractual requirement for hyperscaler RFQs.

Action

Procurement teams pulling in HBM4, HBM4E or NVHBM should ask suppliers which foundry is producing the base die and at what node, since lead time and pricing will increasingly track TSMC 3nm wafer allocation rather than DRAM output alone. Design-in teams evaluating NVHBM should plan thermal and signal-integration margin around the integrated memory controller and confirm validation status for Samsung's 2nm fallback before locking the BOM. XAIPART analysis.

XAIPART Forecast

XAIPART expects at least one of the three NVHBM suppliers - Samsung, SK hynix or Micron - to publicly disclose NVHBM samples built on Samsung's SF2 base die by 2027-09-30 if Samsung's 2nm validation progresses on a typical 12-month cycle for a new base-die tape-out. XAIPART analysis

Facts are as reported by the cited source. The design-in, sourcing and forward-looking statements above are XAIPART's analysis, not the source's claims. Uncertainty: NVHBM performance numbers (30% bandwidth, 15% power, 25% compute die area) are NVIDIA-stated and not independently benchmarked in this report; yield estimates (TSMC 3nm >90%, Samsung SF2 ~60%) are industry estimates attributed by the source, not audited figures; SK hynix and Micron responses to NVIDIA's standardization request are not disclosed.

Corrections: none at publication. This brief will be updated with a timestamp if the source corrects its report.

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Cost pressure by dimension — composite stateDiverging bars for three dimensions around a zero midpoint. Input Cost has no reading; Supply Demand z -1.4711, notable; Fx Energy z 0.2546, neutral. Composite index -9.1, band neutral.0Input costno readingSupply/demandz −1.4711 · notable46 dFX & energyz +0.2546 · neutral5 dcomposite −9.1 · neutral−100 · −40 · −15 · 0 · +15 · +40 · +100
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情報源

  1. NVIDIA pushes TSMC 3nm NVHBM base dies on Samsung SK hynix and Micron, and TSMC adds a Tainan 3nm fab — https://www.trendforce.com/news/2026/10/19/news-nvidia-reportedly-pushes-tsmc-3nm-nvhbm-base-dies-for-samsung-sk-hynix-micron-in-unlikely-foundry-tie-up/ · rss · 参照日

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