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MX30UF4G18AB

MX30UF4G18AB - 4Gbit 1.8V SLC NAND Flash, 48-TSOP | Macronix

The Macronix MX30UF4G18AB is a 4 Gbit (4 Gbit = 512 MiB = 4,096 Mbit of raw NAND storage, organized as 2,048 blocks x 64 pages x 4,096 bytes + spare) 1.8 V single-level cell (SLC) parallel NAND Flash memory in a 48-pin TSOP package, with 25 ns asynchronous page read access time. It is part of the MX30UF 1.8V SLC NAND family, designed for code and data storage in space-constrained, low-power embedded systems. An SLC NAND Flash is a type of non-volatile memory that stores one bit per cell, providing higher endurance (typically 60,000 to 100,000 P/E cycles per block), faster write throughput, and lower bit error rates compared to MLC or TLC NAND. In a system hierarchy it sits as: SLC NAND -> NAND Flash -> non-volatile memory -> semiconductor memory. SLC NAND is commonly chosen over NOR Flash when higher density at lower cost-per-bit is required and a controller (e.g., an eMMC host or raw NAND controller in an SoC) is available to handle bad-block management and ECC. Key features of the MX30UF4G18AB include a 1.8V VCC operation (1.7V to 1.95V range per Macronix datasheet v1.2), a 50 uA maximum standby current in sleep mode, ONFI 1.0-compatible command set, 8-bit I/O bus, and integrated page buffer of 4,320 bytes (4,096 main + 224 spare). The device supports a 528-byte page size with spare area (legacy x8 mode) or a 4,320-byte page in ONFI mode, with multi-plane programming for higher write throughput. Architecturally, the MX30UF4G18AB uses a charge-trap or floating-gate SLC cell array, an internal charge pump to generate high programming voltages from a single 1.8V supply, and an ONFI 1.0-compliant state machine that exposes standard commands (Read, Page Program, Block Erase, Read Status, Read ID, Reset). The 8-bit asynchronous interface makes it compatible with most SoC NAND controllers without glue logic. Typical applications include boot storage in set-top boxes, data logging in industrial IoT sensor nodes, firmware and asset tracking in wearables, and Linux/embedded OS rootfs storage in 1.8V SoCs. Designers choose this part when they need reliable SLC endurance at low power and small form factor. When designing with the MX30UF4G18AB, allocate a minimum of one block (128 KiB) for the bad-block table, enable hardware ECC (typically 4-bit or 8-bit per 528 B sector) in the host controller, and respect the tR/tPROG/tBERS timing budgets. Decoupling must include 0.1 uF plus 4.7 uF near VCC, and WP# should be tied high or driven by the host during in-system programming. This page synthesizes Macronix datasheet specifications, distributor pricing, drop-in alternatives, and practical design notes that go beyond the manufacturer datasheet itself, providing a one-stop engineering reference.

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MX30UF4G26AB

MX30UF4G26AB - 1.8V 4Gbit SLC NAND Flash | Macronix

The Macronix MX30UF4G26AB is a 1.8V 4Gbit SLC NAND Flash memory with parallel interface, organized as 256M x 16, housed in a 63-ball VFBGA package (9x11 mm). It provides 25 ns access time and supports industry-standard ONFI 1.0 timing, making it suitable for high-reliability code and data storage in industrial, networking and embedded designs. SLC NAND Flash is a type of non-volatile memory that stores one bit per cell, delivering higher endurance (typically 60K-100K P/E cycles), faster write throughput, and lower bit error rates than MLC or TLC NAND. It sits within the broader hierarchy of NAND Flash -> non-volatile memory -> semiconductor memory -> integrated circuit, and is widely used where MLC/TLC endurance is insufficient but raw density must remain high. Key features of the MX30UF4G26AB include 4Gbit (4,096 Mbit) density, single-level cell (SLC) architecture, 1.7V to 1.95V single supply operation, and a 16-bit parallel data bus. The device integrates an internal page buffer, ECC status flag and ONFI parameter page support, simplifying host firmware integration. Its 25 ns asynchronous access time delivers 40 MB/s sustained read throughput when paired with a properly designed controller. The architecture combines a charge-trap floating-gate cell with ONFI-compatible command set, ECC-ready status reporting, and multi-plane page programming. Built-in hardware reset and write-protect pins add robustness against unexpected power transients during in-field programming. Typical applications include industrial solid-state drives, factory automation controllers, networking line cards, automotive infotainment storage, and boot/loader code memory in set-top boxes. The 1.8V Vcc also makes it well suited for portable and battery-powered devices where energy efficiency matters. When designing with this part, ensure the host controller supports ONFI 1.0 asynchronous NAND interface timing and that ECC strength (BCH or Hamming) matches the recommended bits-per-512-byte window. This page synthesizes distributor pricing, drop-in alternatives, application examples, and engineering design notes that go beyond the manufacturer datasheet, helping procurement and design engineers make faster sourcing decisions.

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MX30UF4G28AB

MX30UF4G28AB - 4Gbit SLC Parallel NAND Flash | Macronix

The Macronix MX30UF4G28AB is a 4 Gbit (512 M x 8) Single-Level Cell (SLC) parallel NAND flash memory with a 1.8 V power supply, 25 ns access time, and packaged in a 48-pin TSOP-I (TI suffix) or 63-ball VFBGA (XKI suffix). The device delivers 4 Gbit of non-volatile storage using a parallel asynchronous interface with selectable x8/x16 bus width per datasheet specification. An SLC NAND flash memory stores one bit per cell using a single-level charge representation, offering higher endurance (typically 100k P/E cycles per block), faster write performance, and longer data retention than MLC/TLC counterparts. Within the broader non-volatile memory hierarchy, NAND flash sits between NOR flash (byte-addressable, used for code storage) and managed NAND (e.g., eMMC, UFS - integrating controller and NAND in a single package). SLC NAND specifically targets industrial, automotive, and embedded systems where reliability and write endurance outweigh the per-bit cost advantage of higher-density MLC/TLC. Key features include ONFI 1.0-compatible command set, two-plane operation with Status Enhanced Read command (78h), 25 ns page read access, internal data move/erase, and hardware data protection. The 1.8 V core and I/O voltage (1.7 V to 1.95 V range) makes it suitable for low-power embedded designs, and the TSOP-I package provides a drop-in migration path from legacy parallel NOR/PSRAM layouts. The device uses a charge-trap or floating-gate SLC NAND array organized as 4096 blocks (typical 128 Kbytes each) with 2112-byte pages (2048 data + 64 spare), supporting single-plane and two-plane page read/program operations. The asynchronous parallel interface is fully multiplexed with CE, ALE, CLE, RE, WE control signals to a shared 8/16-bit I/O bus, and the integrated controller manages ECC, bad-block management, and wear-leveling hints. Typical applications include industrial embedded storage (HMI, PLC data logging), networking equipment boot+OS storage, automotive infotainment and instrument clusters, set-top box firmware storage, and point-of-sale terminals requiring high-endurance non-volatile memory with parallel interface simplicity. When designing with this part, follow ONFI 1.0 timing parameters, allocate ECC strength of at least 4-bit per 528 bytes (BCH or Hamming), implement bad-block management in firmware, and reserve the spare area for ECC metadata plus block status. Avoid hot-temperature write operations beyond 70 °C if maximum P/E endurance is required. This page synthesizes distributor pricing, drop-in alternatives from the same Macronix NAND family, and practical SLC NAND design notes not aggregated in the manufacturer datasheet alone.

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MX30UF4GE8AB

MX30UF4GE8AB - 4Gb 1.8V SLC NAND Flash, VFBGA-63 | Macronix

The Macronix MX30UF4GE8AB is a 4 Gbit (512M x 8) 1.8 V Single-Level Cell (SLC) NAND Flash memory device supplied in a 63-ball VFBGA package (9 x 11 mm, 0.80 mm pitch, 1.0 mm height). It is ONFI 1.0 compliant and is designed for low-density, high-reliability code and data storage in embedded systems where long-term data retention, high endurance and predictable latency are required. An SLC NAND Flash is a non-volatile memory that stores one bit per cell, providing higher endurance (typically 100k P/E cycles), faster write speeds and longer data retention than MLC/TLC NAND. SLC NAND belongs to the NAND flash memory category, which is part of the broader non-volatile memory class within semiconductor memory ICs. SLC is widely used in industrial, automotive, networking and IoT applications where MLC/TLC reliability is insufficient. Key features include a 1.8 V single supply operation, 512M x 8 organization, x8 I/O bus, ONFI 1.0 parameter page support with CRC verification, internal data move (copy-back) operation, and multi-plane program/erase architecture for higher throughput. The device supports standard NAND command sets and is drop-in compatible with the broader ONFI 1.0 ecosystem used by other 1.8 V SLC NAND families. The MX30UF family is implemented in a robust 1.8 V process, with an operating voltage range of 1.7 V to 1.95 V and an extended temperature grade typically rated -40C to +85C for industrial use. The internal ECC-friendly interface and dedicated hardware read/write commands simplify firmware integration. Typical applications include industrial embedded Linux boot storage, automotive infotainment and telematics code/data storage, networking equipment firmware, IoT gateways with local data logging, and consumer STB/PND systems. The SLC endurance profile makes the device especially suitable for write-intensive logging in surveillance, point-of-sale and metering. When designing with this device, follow standard NAND layout practices: keep the 8-bit data bus length-matched, place 0.1 uF + 10 uF decoupling close to VCC and VCCQ, and route the R/B# pin with a pull-up. A controller must implement ECC and bad block management, as per ONFI 1.0. This page synthesizes distributor pricing, drop-in alternatives, and design notes not found in the manufacturer datasheet.

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MX574AJMWI/PR+W

MX574AJMWI/PR+W - 12-Bit 40kSPS SAR ADC, 28-SOIC | Maxim Integrated

The Analog Devices (formerly Maxim Integrated) MX574AJMWI/PR+W is an industry-standard 12-bit successive-approximation analog-to-digital converter (SAR ADC) with a single-ended 1-input configuration, housed in a 28-pin SOIC (0.295 inch / 7.5 mm width) surface-mount package and specified for commercial temperature grade operation. It delivers up to 40 ksps sampling rate on a parallel data interface and integrates an on-chip clock and voltage reference, eliminating the need for external timing components and saving board area. The converter combines high-speed conversion with low power consumption, a hallmark of the legacy MAX174 / MX574A / MX674A ADC family. A successive-approximation register ADC is a type of data converter that resolves a sampled analog input one bit at a time using an internal binary-search algorithm and a precision DAC. SAR ADCs occupy the middle ground between slow but accurate delta-sigma converters and fast but noisy flash converters, and are commonly used when both deterministic latency (one conversion per N clock cycles) and moderate-to-high accuracy (10 to 16 bits) are required at sampling rates from a few kSPS up to several MSPS. As an ADC, this part belongs to the broader hierarchy: data converter -> ADC -> SAR ADC -> integrated circuit -> semiconductor. Key features include 12-bit resolution, a single-ended input, a parallel output bus, and built-in reference. The on-chip reference removes an external precision component, while the built-in clock simplifies timing by allowing an external crystal or RC to drive the converter. The wide 28-SOIC gull-wing footprint supports standard surface-mount assembly and hand-reworkable prototypes, and the commercial temperature grade makes the part well suited to lab and indoor equipment rather than harsh-environment installations. Typical applications include broadband fixed-line access equipment, test and measurement instrumentation, and enterprise machine control systems. The combination of moderate sampling speed, integrated reference, and parallel readout makes the MX574A family a long-time workhorse in process-control front ends and rack-mounted data-acquisition boards. The PR+W suffix denotes a specific reel and pin-1 orientation variant of the same silicon die as the MX574AJMWI/PR+, and is fully pin-compatible with the rest of the MX574A 28-SOIC family. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes that are not consolidated in the manufacturer datasheet itself, giving procurement and design engineers a single reference for evaluating, sourcing, and replacing this legacy Maxim ADC.

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MX574ALCWI+

MX574ALCWI+ - 12-Bit Precision SAR ADC, 28-SOIC | Maxim Integrated

The Analog Devices (formerly Maxim Integrated) MX574ALCWI+ is a 12-bit, successive-approximation-register (SAR) analog-to-digital converter with 1 single-ended input, supplied in a 28-pin SOIC package. Per the Maxim datasheet, it is part of the industry-standard MAX174/MX574A/MX674A family of complete 12-bit ADCs that integrate a high-speed SAR core, on-chip clock, internal buried-zener voltage reference, and a precision DAC, delivering a complete ADC function in a single IC. Typical conversion time is approximately 25 us using the internal clock and the internal 10V reference, which simplifies board design versus discrete ADC implementations. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a type of data converter that performs a binary search across an internal DAC to determine the digital code of the input analog voltage. SAR ADCs sit in the broader hierarchy of data converters (ADC -> data converter -> data acquisition -> signal chain IC -> semiconductor) and are valued for high accuracy, low latency, deterministic latency, and lack of pipeline delay - making them ideal for multiplexed data-acquisition front ends and industrial instrumentation. The MX574A/MX674A series is a long-standing industry workhorse used in legacy designs that still require drop-in replacements today. Key features include 12-bit resolution with no missing codes, +/-1 LSB maximum integral nonlinearity (INL) on the A-grade part, an internal 10V buried-zener reference with low drift, and flexible input ranges of 0V to 10V, 0V to 20V, +/-5V, and +/-10V selected by pin strapping. The device supports both unipolar and bipolar true-bipolar analog input operation without external signal conditioning. Throughput is up to 40 ksps using the internal clock and an external start-conversion pulse, and the device operates from +/-12V to +/-15V (or +5V digital supply). The SOIC-28 package exposes the analog inputs, reference, and digital bus separately for clean PCB layout. Technically, the MX574ALCWI+ uses a charge-redistribution SAR architecture with a thin-film resistor-ladder DAC and laser-trimmed reference. The on-chip clock oscillator eliminates the need for an external crystal or RC timing network for most applications. Three-state outputs allow direct connection to an 8-bit, 12-bit, or 16-bit microprocessor data bus, supporting both 8-bit and 16-bit read modes. A separate -12V/-15V analog supply and +5V digital supply isolate noisy digital currents from the analog input path. Typical applications include industrial process control and data acquisition, multiplexed analog input modules, precision instrumentation, vibration and strain-gauge signal conditioning digitizers, and medical monitoring front ends. Its single-supply bipolar input ranges also suit legacy PLC analog I/O cards and SCADA systems that still use +/-10V signal standards. Replacement situations are common, as the part is widely second-sourced by ADI/PMI and has been continuously manufactured for over three decades. When designing with this part, ensure the analog and digital grounds are separated at the IC and joined only at one point to prevent digital ground-return currents from coupling into the analog input. A 10 uF bypass cap on the +5V digital supply and a 10 uF + 0.1 uF combination on the +/-15V analog supplies minimize noise. The reference output (REF OUT, pin 11) should be buffered if multiple loads are driven, since the internal reference cannot supply heavy current. This page synthesizes distributor pricing, same-brand SAR ADC alternatives in SOIC-28, drop-in recommendations, and practical design notes not found on a single distributor listing, complementing the manufacturer datasheet.

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MX574ALCWI+T

MX574ALCWI+T - 12-Bit 40kHz SAR ADC, 28-SOIC | Maxim Integrated

The Analog Devices (formerly Maxim Integrated) MX574ALCWI+T is an industry-standard, complete 12-bit successive-approximation analog-to-digital converter (SAR ADC) with an on-chip precision voltage reference and on-chip clock, housed in a 28-pin wide-body SOIC package. The +T suffix indicates tape-and-reel packaging for high-volume assembly. The part combines a 12-bit resolution with a maximum throughput of 40 ksps (typical conversion time ~25 us) and integrates the reference, clock, and SAR logic into a single die, eliminating the external support components that legacy discrete ADC designs required. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a type of ADC that performs a binary search through successive bits to convert an analog input to a digital code. SAR ADCs sit in the broader hierarchy of ADC architectures (SAR <-> Flash <-> Sigma-Delta <-> Pipeline) and trade off speed and latency for high DC accuracy and very low power consumption, making them well suited for multiplexed data-acquisition systems and industrial process control loops. The MX574A family was originally introduced as an industry-standard pin-compatible upgrade to the classic AD574A. Key features include ±5 V or ±12 V/±15 V analog input ranges (unipolar 0-10 V/0-20 V or bipolar ±5 V/±10 V), ±1 LSB maximum integral nonlinearity (INL), and a built-in +10.000 V buried-Zener reference with ±10 mV initial accuracy. The -L speed-grade variant (MX574ALCWI+T) operates up to 40 ksps; higher speed grades (MX574AJCWI/T, MX574AKCWI/T) are pin-compatible and offer 100 ksps. The on-chip clock eliminates external timing components, and a TRIM pin allows fine adjustment of the internal reference offset and gain. The MX574A's architecture uses a capacitive charge-redistribution DAC and a precision comparator, controlled by the on-chip SAR. Because the reference, comparator, and ladder network are all laser-trimmed at the wafer level, no external calibration is required at room temperature. The chip also offers a unipolar/bipolar input mode pin (BIPOLAR) and an input range pin (10VIN), letting the designer configure full-scale input voltage by pin strapping without external resistor networks. Typical applications include industrial process control front ends, medical instrumentation signal conditioning, data-acquisition (DAQ) cards, and precision transducer readout. The MX574ALCWI+T is also widely used as a replacement for the legacy AD574A in legacy designs where pin compatibility is mandatory. The wide SOIC-28 footprint and ±12 V analog supply tolerance make it tolerant of legacy ±15 V industrial rails. When designing with this device, the analog (VCC) and digital (VLOGIC) supply domains must be decoupled separately with 0.1 uF ceramic capacitors placed within 5 mm of the supply pins. The analog input pin must be driven from a low-impedance source (≤ 1 kohm) to settle within one aperture window; a series 100 ohm resistor followed by a 1 nF capacitor helps buffer transients from a mux. Avoid routing digital outputs near the analog input traces to minimize digital-to-analog crosstalk. The internal reference is trimmed for ±10 mV but drifts with temperature, so for sub-LSB applications external precision references are recommended. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

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MX574ALEWI+CDR

MX574ALEWI+CDR - 12-Bit SAR ADC, 25us, 28-SOIC | Maxim

The Analog Devices / Maxim Integrated MX574ALEWI+CDR is an industry-standard, complete 12-bit successive-approximation analog-to-digital converter (SAR ADC) with 25us conversion time, on-chip clock and on-chip voltage reference, packaged in a 28-pin wide-body SOIC (EWI suffix, 300-mil SOP) for commercial temperature grade and shipped on Tape & Reel (CDR suffix). An SAR ADC is a type of data converter that uses a binary search algorithm and an internal capacitive DAC to digitize an analog input. Each conversion takes a fixed number of clock cycles, and the architecture delivers excellent linearity and no pipeline delay, which makes it well-suited to multiplexed data-acquisition front-ends, industrial instrumentation, and process control loops where predictable latency matters more than raw sample rate. Key features include 12-bit resolution, +/-1 LSB maximum linearity error, an internal buried-Zener reference trimmed for low drift, and a tri-state output buffer for direct connection to 8-bit or 16-bit microprocessor buses. The device accepts 0 to +10 V or 0 to +20 V unipolar analog input ranges (and +/-5 V or +/-10 V bipolar ranges when configured), and the parallel byte/word output interface simplifies integration with 8051, 68HC11, and DSP processors. The MX574A uses a precision laser-trimmed thin-film resistor ladder and an on-chip temperature-compensated bandgap reference; successive-approximation registers perform a binary search to produce the digital output. Internal timing is generated by an on-chip oscillator, removing the need for an external conversion clock, while the reference buffer can drive external loads up to 1.5 mA. Typical applications include process control front-ends, multi-channel data-acquisition boards, instrumentation and test equipment, digital panel meters, and any 8051/68HC11/DSP-based system that needs a complete, no-external-component ADC. The 25us conversion time places the part in the medium-speed SAR category - faster than integrating ADCs but slower than 1 MHz successive-approximation converters such as the AD574A. Design tip: keep the analog input bandwidth well below the device's aperture limit and place a small RC filter (typically 100 ohm + 1 nF) ahead of the analog input pin to suppress charge-injection transients from the internal DAC switching. Decouple VCC and VEE with 10 uF tantalum + 0.1 uF ceramic caps placed within 5 mm of the supply pins. This page synthesizes real distributor pricing, drop-in alternatives drawn from the same Maxim MX574A family, and practical design notes not found in the bare manufacturer datasheet.

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MX574ALEWI+TCDR

MX574ALEWI+TCDR - 12-Bit 25µs SAR ADC, 28-SOIC | Maxim Integrated

The Analog Devices (formerly Maxim Integrated) MX574ALEWI+TCDR is an industry-standard, complete 12-bit successive-approximation analog-to-digital converter (SAR ADC) housed in a 28-pin wide-body SOIC (SOIC-28W) package. The MX574A family integrates a high-speed, low-power 12-bit ADC with an on-chip clock, an internal +10V precision buried-Zener voltage reference, and a digital interface that supports ±5V, 0–5V, 0–10V, and ±10V analog input ranges. Maximum conversion time is 25µs at 12 bits, and the part is designed for unipolar or bipolar operation through a single supply configuration. What is a SAR ADC? A successive-approximation-register ADC is a type of data converter that converts an analog input voltage into a digital code using a binary-search algorithm implemented with a comparator, a DAC, and a successive-approximation register. SAR ADCs occupy the sweet spot between slow integrating converters (which offer excellent linearity at low speed) and fast flash ADCs (which offer high speed but consume significant power and pin count). They deliver 8 to 18 bits of resolution at sample rates from a few hundred kSPS to a few MSPS, with deterministic latency, no pipeline delay, and very low power consumption - making them ideal for multiplexed data-acquisition systems, industrial process control, and instrumentation. Key features of the MX574ALEWI+TCDR include ±1 LSB max integral linearity error (A-grade), 25µs maximum conversion time, a built-in +10V reference with ±0.25% initial accuracy, 12-bit parallel and serial interface options, and three-state output buffers that allow direct connection to microprocessor data buses. The device operates from ±12V or ±15V analog supplies with a +5V digital supply, and its bipolar-input capability simplifies signal-conditioning front ends for industrial sensors and audio equipment. The MX574A architecture combines a precision thin-film resistor network, a CMOS comparator, a current-mode DAC, and a SAR register, all trimmed at the wafer level. This integration eliminates external trimming and allows designers to use the ADC immediately after power-up without calibration routines, which historically made the MX574A the de-facto industry-standard 12-bit ADC for both standalone and embedded data-acquisition boards. Typical applications include industrial process control, multiplexed data-acquisition front ends, signal isolation front ends paired with opto-isolators, precision measurement instrumentation, audio digitizers, and embedded board-level designs where +12V supplies are available and -48V telecom battery monitoring is required. When designing with this part, provide a clean +5V digital supply decoupled with 0.1µF and 10µF capacitors close to the supply pins. Use a separate analog ground plane for the input and reference sections, and route the 12-bit parallel bus away from the analog inputs to prevent digital coupling into the converter. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found in the manufacturer datasheet.

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MX574ALN+

MX574ALN+ - 12-Bit Industry-Standard ADC | Maxim Integrated

The Maxim Integrated MX574ALN+ is an industry-standard, complete 12-bit successive-approximation analog-to-digital converter (ADC) that combines high conversion speed, low power consumption, an on-chip clock, and an internal voltage reference in a single 28-pin PDIP (DIP-28) through-hole package. It accepts a unipolar analog input range of 0V to 10V or 0V to 20V (and bipolar ±5V or ±10V with proper drive), achieves 12-bit resolution with no missing codes over the commercial temperature range, and uses a high-speed successive-approximation architecture. Key headline specifications include a 40 µs (typ) maximum conversion time, ±5V or ±10V input ranges with input protection, an internal buried-Zener reference trimmed to ±0.3% (10V mode), and 1/2 LSB max integral nonlinearity. An analog-to-digital converter (ADC) is a mixed-signal integrated circuit that samples a continuous analog voltage and quantizes it into a discrete digital code, forming the bridge between real-world analog signals and digital processors. Successive-approximation ADCs (SAR ADCs) use a binary-search algorithm with an internal DAC and comparator to converge on the input voltage one bit per clock cycle; they sit in the broader taxonomy of ADC architectures alongside flash, sigma-delta, pipeline, and integrating ADCs, and are prized for a favorable balance of speed, resolution, and low power consumption. The MX574A belongs to the industry-standard ADC family that has been second-sourced for decades, making it a common legacy building block in industrial, instrumentation, and process-control designs. Key features of the MX574ALN+ include a built-in track-and-hold amplifier, three-state output buffers that interface directly to an 8-/12- or 16-bit microprocessor data bus, and an internal 10V buried-Zener reference that is laser-trimmed to within ±0.3% maximum error. The converter is specified for the commercial temperature range of 0°C to +70°C, operates from standard ±15V and +5V supplies, and provides digital control inputs for conversion start and byte-multiplexed read cycles. Its parallel 12-bit output simplifies integration with legacy 8-bit microprocessors such as the 8080, 6800, and Z80 family, where two successive read cycles deliver the 8 LSBs and 4 MSBs. Typical applications include process-control instrumentation, data-acquisition front ends, precision sensor signal conditioning, panel meters and digital voltmeters, medical instrumentation front ends, and legacy industrial automation systems. The wide ±15V-tolerant analog input stage and robust 12-bit linearity make it a strong fit for digitizing transducer outputs (load cells, pressure transducers, thermocouple amplifiers) where 1 LSB resolution at 10V full scale (2.44 mV) is acceptable and design reuse matters. When designing with this device, observe the analog input current requirements during acquisition; an external buffer amplifier or proper RC network may be required for high-impedance sources. The internal reference pin (REF) should be decoupled with a 10 µF tantalum and 0.1 µF ceramic pair per the manufacturer application note to minimize reference-induced conversion noise. Note that the MX574A is a long-running legacy part - confirm long-term availability before committing to new high-volume designs.

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MX574ALP+T

MX574ALP+T - 12-Bit SAR ADC, 28-PLCC | Maxim Integrated

The Maxim Integrated MX574ALP+T (now under Analog Devices) is an industry-standard 12-bit successive-approximation analog-to-digital converter (SAR ADC) that combines high conversion speed, low power consumption, and a complete on-chip interface including clock and buried-zener voltage reference, housed in a 28-pin PLCC (11.51 x 11.51 mm) package with J-bend terminals. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a sampling data converter that uses a binary-search algorithm to converge on the input voltage. SAR ADCs sit in the broader hierarchy of ADC architectures (SAR -> data converter -> ADC -> signal chain IC -> semiconductor) and are favored for precision instrumentation because they deliver medium-to-high resolution (12-18 bits) at medium speeds (100 kSPS to few MSPS) without the latency of delta-sigma converters or the glitch of flash converters. The MX574A belongs to the industry-standard "574/674/174" ADC family, originally industry workhorses for industrial process control. Key features include 12-bit resolution with no missing codes over the full temperature range, a precision 10 ppm/°C (max) low-drift internal reference, a track/hold amplifier front end, and a parallel/word-wide digital interface for fast microprocessor read cycles. The device accepts 0 to +10 V or 0 to +20 V unipolar or ±5 V, ±10 V bipolar analog input ranges depending on strap configuration, and runs from ±12 V / +5 V analog supplies. Conversion time is on the order of 25 µs maximum, supporting data-acquisition rates up to ~40 kSPS at full 12-bit accuracy. Typical applications include high-accuracy process-control front ends, digital-signal-processing front ends, high-speed data-acquisition boards, and electro-mechanical test systems. The wide input voltage ranges make the MX574ALP+T drop-in usable in legacy industrial backplanes built around +10 V signal conditioning. When designing with this ADC, ensure the AV+/AV- analog supplies are well decoupled and that the impedance driving the analog input is well below the source-impedance budget to avoid gain errors. The internal reference can be overridden by an external reference if drift budgeting demands it. This page synthesizes live distributor pricing, parametric drop-in alternatives, and practical design notes that complement the manufacturer datasheet for engineers evaluating the MX574ALP+T.

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MX674AKN+

MX674AKN+ - 12-Bit 15us SAR ADC, 28-DIP | Maxim Integrated

The Maxim Integrated MX674AKN+ is a 12-bit, industry-standard, complete analog-to-digital converter (ADC) that combines high speed, low power consumption, and on-chip clock and voltage reference in a 28-pin PDIP (0.600 inch, 15.24 mm) through-hole package. It uses a successive-approximation-register (SAR) architecture with a single-ended analog input and provides parallel digital output, with a maximum conversion time of approximately 15 microseconds per sample. The device operates from +/-11.4 V to +/-16.5 V analog supplies with a +5 V digital supply and supports both external and internal voltage reference modes. A SAR ADC is a class of data converter that performs a binary search through an internal sample-and-hold and comparator network to digitize an analog input in N clock cycles for an N-bit output. SAR ADCs sit in the broader hierarchy of analog-to-digital converters -> data converters -> data acquisition ICs -> signal chain ICs -> power management and signal chain semiconductors. SAR converters are valued for deterministic latency, no pipeline delay, and excellent DC accuracy, making them a standard choice for industrial process control, instrumentation, and test equipment where one-shot or low-rate multi-channel sampling is required. The MX674A family's BiCMOS construction reduces power dissipation relative to earlier bipolar-only designs such as the AD574A, while preserving full compatibility with the industry-standard AD574A pinout and timing. Internal reference trim eliminates the need for an external reference in many systems, and an external reference input allows designers to ratio-metric applications or to drive absolute-accuracy applications from a precision external source. The 28-PDIP package simplifies prototyping and breadboarding on through-hole boards, while the part's +/-15 V analog range interfaces directly with typical industrial +/-10 V or 0-10 V signal conditioning outputs. Typical applications include industrial process control, automated test equipment, data loggers, medical instrumentation front ends, and precision sensor signal chains. The wide analog supply range (+/-11.4 V to +/-16.5 V) supports +/-12 V and +/-15 V system rails common in factory automation and laboratory instruments. The parallel digital output drives standard microprocessors and microcontrollers without requiring glue logic. When designing with this part, place the analog and digital grounds on a single low-impedance plane and connect them at one point near the ADC to avoid digital switching noise coupling into the analog input. The internal reference settles within the conversion window when the S/H capacitor is properly bypassed; for highest DC accuracy applications, use an external precision reference such as the MAX6350. The device's commercial 0C to +70C operating range limits it to non-automotive, indoor applications. This page synthesizes distributor pricing, drop-in alternatives within the same 28-PDIP footprint, and practical design notes not found in the manufacturer datasheet. Engineers evaluating the MX674AKN+ for a redesign or new design should treat the alternative list as a pin-compatible replacement matrix rather than a functional-equivalence matrix; cross-package alternatives require PCB rework.

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MX674ALCWI+

MX674ALCWI+ - 12-Bit SAR ADC, 28-SOIC | Maxim Integrated

The Maxim Integrated MX674ALCWI+ (now branded Analog Devices / Maxim Integrated) is an industry-standard, complete 12-bit successive-approximation analog-to-digital converter (SAR ADC) with 1 input channel, internal clock, and internal 10V voltage reference, housed in a 28-pin SOIC (Wide, 0.300") package. Per the Maxim datasheet family, the MAX174/MX574A/MX674A ADC family supports a maximum conversion time of 25 us and operates from +/-12V or +5V analog supplies, depending on the temperature grade, making it a drop-in modern replacement for the long-discontinued AD574A. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a precision ADC architecture that uses an internal DAC and comparator to binary-search the input voltage over N clock cycles (where N is the resolution in bits). For a 12-bit SAR ADC like the MX674ALCWI+, each conversion completes in 12 clock cycles plus settling time, providing a deterministic acquisition window, low latency, and no pipeline delay. SAR ADCs sit in the hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor, and are favored over delta-sigma ADCs in multiplexed data-acquisition systems, industrial control loops, and instrumentation where single-shot accuracy and fast response matter more than maximum noise resolution. Key features of the MX674ALCWI+ include 12-bit resolution with +/-1 LSB maximum linearity error (L grade), bipolar input range of +/-5V or +/-10V (selected by pin strapping), single +5V digital supply compatibility, a 25 us maximum conversion time, and an internal buried-zener reference trimmed to 10.00V. The device also provides three-state output buffers for direct connection to an 8-bit or 16-bit microprocessor data bus, plus standard control lines (CS, R/C, CE, AO) compatible with the AD574A and AD674A pinout. The MX674ALCWI+ is built on a bipolar/CMOS (BiCMOS) process that allows the analog input section to operate from +/-12V or +/-15V supplies while the digital section runs from a single +5V rail. This mixed-voltage architecture eliminates the level shifters that would otherwise be required when interfacing to a 5V microcontroller or DSP. The internal reference is a buried-zener design with low drift and low noise, typically 10 ppm/C, enabling uncalibrated 12-bit accuracy over the commercial 0C to +70C temperature range. Typical applications include industrial process-control data acquisition boards, multi-channel 4-20 mA loop digitization, precision instrumentation front-ends, medical patient-monitoring equipment, and legacy replacement designs for AD574A/AD674A sockets in defense, aerospace, and test-and-measurement systems. When designing with the MX674ALCWI+, the analog input must be driven from a low-impedance source (typically an op-amp buffer such as the AD845 or OP-27) to keep the input settling time below the acquisition window. Decoupling with 0.1 uF ceramic + 10 uF tantalum on each supply pin is mandatory, and unused digital input pins should not be left floating - tie them to logic-high or logic-low as specified in the datasheet. This page synthesizes distributor pricing, drop-in alternative cross-references, and practical design notes that go beyond the manufacturer datasheet, helping engineers evaluate the MX674ALCWI+ for new designs and legacy AD574A socket replacements.

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MX674ALCWI+T

MX674ALCWI+T - 12-Bit SAR ADC with Ref, 28-SOIC | Maxim Integrated

The Maxim Integrated MX674ALCWI+T is a complete 12-bit successive-approximation analog-to-digital converter (SAR ADC) that integrates the reference, clock, and three-state output buffers on-chip, housed in a 28-pin wide-body SOIC package. It operates from +5 V and +/-15 V analog supplies (or single +5 V supply), samples at up to 66 ksps, and provides 12-bit parallel output with 8- and 16-bit microprocessor interface compatibility. What is a SAR ADC? A successive-approximation analog-to-digital converter is a type of ADC that uses a binary-search algorithm against an internal DAC to resolve an analog input into a digital code, balancing conversion speed with moderate-to-high resolution. SAR ADCs sit in the hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. They are favored over flash converters for moderate resolution (12-16 bits) where lower power, smaller die, and high noise immunity matter more than raw GHz sampling. Key features include an on-chip buried-Zener reference for long-term stability, 12-bit linearity with +/-1 LSB maximum INL and DNL, three-state output buffers that simplify bus sharing, and a choice of input ranges (0-10 V, +/-5 V, +/-10 V, 0-20 V) selectable via pin strapping. The device also provides a status output (STS) that simplifies polling or interrupt-driven service routines to a host processor. Typical applications include industrial process-control front-ends, instrumentation data acquisition, motor-control current/voltage sensing, medical patient-monitoring front-ends, and precision transducer signal conditioning. Designers choose the MX674 over 16-bit ADCs when 12-bit dynamic range is acceptable and lower cost / faster conversion is required. The wide SOIC-28 footprint simplifies hand-prototyping and rework compared to small-outline QFN alternatives. A practical design tip: reserve adequate digital-to-analog ground separation because the internal clock transitions can inject noise into the analog input. Use a single star ground or a solid analog/digital split to preserve 12-bit noise floor performance.

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MX7575KP+

MX7575KP+ - 8-Bit 5µs ADC with Track/Hold, PLCC-20 | Maxim

The Maxim Integrated (now Analog Devices) MX7575KP+ is a CMOS, microprocessor-compatible, 8-bit successive-approximation analog-to-digital converter (ADC) with 5µs/10µs conversion time, integrated on-chip track/hold, and a 20-pin PLCC package. It accepts a 0V to 2.46V unipolar analog input range, supports input bandwidth up to 50 kHz (386 mV/µs slew rate), and includes a parallel microprocessor interface for direct connection to 8-bit data buses. An 8-bit successive-approximation ADC is a type of data converter that uses a binary-search algorithm against an internal precision DAC to resolve an analog input into a digital code, balancing speed, resolution, and cost. Successive-approximation ADCs sit in the broader hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. They are favored for general-purpose digitisation where 8-16 bit resolution at medium sampling rates is sufficient, dominating applications like process control, instrumentation, and embedded sensor reading. Key features include 5µs typical conversion time (10µs maximum), on-chip track/hold for full-scale signals up to 50 kHz, a unipolar 0-2.46V analog input range, +5V single-supply operation, and a parallel µP-compatible interface that maps directly onto bus architectures. Internal reference and clock options simplify external bill-of-materials, and the CMOS construction keeps power consumption moderate for a 5V ADC. The MX7575KP+ operates from a single +5V supply and is specified over the commercial 0°C to +70°C temperature range. The built-in track/hold removes the need for an external sample-and-hold amplifier in most applications, reducing system cost and board area. Conversion initiation can be controlled via the WR/RD inputs, allowing the host CPU to read conversion results without an external latch. Typical applications include process control and industrial data acquisition, digital-panel meters, portable instrumentation, embedded microcontrollers requiring an analog channel, test equipment front-ends, and simple closed-loop control systems. The 5µs conversion time suits loop bandwidths in the kilohertz range, comfortably digitising 4-20 mA-derived signals after scaling. The MX7575KP+ is the PLCC-20, 0°C-to-+70°C commercial-grade variant of the MX7575 family; it is differentiated from the MX7575JP+ (CERDIP package), the MX7575KP-T (tape-and-reel packaging code), and the MX7575JN by package and operating grade. Designers should ensure a clean analog ground plane and a 0.1µF supply bypass capacitor close to the supply pin to avoid conversions errors from digital switching noise. This page synthesizes distributor pricing, same-family drop-in variants, and PLCC-20 compatible alternatives not aggregated elsewhere, giving sourcing and engineering teams a single reference for evaluating the MX7575KP+ for new designs or legacy second-source support.

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MX7575KP+T

MX7575KP+T - 8-Bit 200kSPS SAR ADC w/ T/H | Maxim Integrated

The Analog Devices / Maxim Integrated MX7575KP+T is a 8-bit, 200 kSPS successive-approximation analog-to-digital converter with an on-chip track-and-hold amplifier, packaged in a 20-pin PLCC (LCC-20) carrier suitable for tape-and-reel delivery. It converts a 0 V to +2.46 V unipolar analog input range and interfaces to microprocessors through a standard 8-bit parallel data bus with CS and RD control lines. An 8-bit successive-approximation ADC (SAR ADC) is a type of data converter that uses a binary-search algorithm against an internal precision DAC to determine each code in N conversion clock cycles. SAR converters are valued for deterministic latency, single-shot accuracy, and low power consumption, and they sit within the broader hierarchy of analog-to-digital converter -> data converter -> signal chain IC -> mixed-signal semiconductor. The MX7575 family sits at the low-resolution, high-speed end of that hierarchy. Key features include a 5 us conversion time (compatible with the slower 10 us MX7576), a track-and-hold capable of acquiring full-scale signals up to 50 kHz (386 mV/us slew rate), a microprocessor-compatible parallel interface, single +5 V supply operation from 4.75 V to 5.25 V, and commercial 0 C to +70 C temperature grade. Internal reference and clock options are integrated to minimise external parts count. The MX7575 uses a standard CMOS SAR core with an input track-and-hold that allows full-scale dynamic signals to be converted without an external sample-and-hold. The 8-bit parallel output simplifies hookup to common 8-bit microcontrollers and DSPs of its era, and the part is offered in PLCC-20 and PDIP-20 packages. Power dissipation is modest at approximately 25 mW active, with an explicit power-down mode that drops quiescent draw for battery-instrument applications. Typical applications include portable digital instrumentation, process-control front ends, embedded data-acquisition boards, multiplexed data-logging systems, and replacement of legacy 8-bit ADC slots in industrial controllers. The PLCC-20 footprint and parallel bus make it a drop-in candidate when modernising legacy designs that originally specified the Maxim MX7575 or pin-equivalent AD7575. When designing with this part, place a 0.1 uF decoupling capacitor close to VDD, observe the 5 us acquisition-aperture timing relative to RD/CS, and ensure the analog input stays within 0 V to VREF to avoid code saturation. The PLCC-20 socket or footprint allows hand-rework-friendly prototyping, but production runs are typically tape-and-reel for surface-mount assembly. This page synthesises distributor pricing, same-family Maxim drop-in alternatives, and practical design notes that complement the manufacturer datasheet. It is intended for engineers evaluating the MX7575KP+T for new designs, obsolescence re-sourcing, or as a pin-compatible swap where the AD7575 was originally specified.

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MX7575SQ/883B

MX7575SQ/883B - 8-Bit 5µs SAR ADC, MIL-883B | Maxim Integrated

The Maxim Integrated MX7575SQ/883B is an 8-bit, microprocessor-compatible, successive-approximation analog-to-digital converter (SAR ADC) with a 5 µs conversion time, housed in an 18-pin CDIP (ceramic DIP) package and qualified to MIL-STD-883B for military and aerospace applications. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a type of data converter that uses a binary-search algorithm against an internal precision DAC to determine each bit of the output word in N clock cycles for an N-bit converter. SAR ADCs occupy the middle ground between flash ADCs (fastest, lowest resolution) and sigma-delta ADCs (highest resolution, slowest); they are the workhorse converter for 8-to-16-bit industrial, instrumentation, and process-control sampling because they deliver a single conversion on demand with deterministic latency and modest power consumption. Key features of the MX7575SQ/883B include a single +5 V supply operation, parallel data output for direct µP bus connection, a built-in track-and-hold, and a ratiometric reference input that lets the user scale full-scale range to any span between 0 V and VREF. The /883B suffix indicates the part is processed to MIL-STD-883B, including burn-in and extended temperature screening, making it suitable for avionics, missile guidance, and ruggedized industrial systems. Architecturally, the MX7575 family combines a CMOS successive-approximation register, a precision thin-film DAC ladder, and a CMOS comparator on a single die. The 5 µs typical conversion time at 8 bits resolution corresponds to roughly 200 kSPS sampling capability, which is sufficient for control-loop digitizing, vibration monitoring, and multiplexed data acquisition. Typical applications include military/aerospace data acquisition systems, industrial process-control analog input modules, multiplexed 4-to-16 channel scanning digitizers, vibration and acoustic monitoring front-ends, and legacy µP-based instrumentation where parallel-output ADCs simplify interface glue logic. The ceramic DIP package and MIL-STD-883B screening also make it a preferred choice for new designs that must trace to MIL-PRF-38535 qualified manufacturing lines. When designing with this converter, route the analog input trace as a guard-ring-protected microstrip, decouple VDD and VREF with 10 µF tantalum in parallel with 100 nF ceramic at the package pins, and drive /CS and the conversion-start logic with a clean digital supply. The reference pin must be bypassed with at least 1 µF to ground. This page synthesizes distributor availability (5100 units in stock per icDirectory as of 2026-10-15), MIL-STD-883B qualification notes, and same-package Maxim cross-references that you will not find aggregated in the manufacturer datasheet PDF alone.

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MX7575TQ/883B

MX7575TQ/883B - 8-Bit 5µs SAR ADC, Military, 18-CDIP | Maxim

The Maxim Integrated MX7575TQ/883B is a high-speed, microprocessor-compatible, 8-bit analog-to-digital converter (ADC) housed in an 18-pin ceramic DIP (CDIP) package and qualified to MIL-STD-883B. According to the Maxim datasheet, the device performs successive-approximation conversions in 5µs (typical) or 10µs (max), and integrates an on-chip track-and-hold that allows full-scale input signals up to 50 kHz (386 mV/µs slew rate) to be digitized without an external SHA. What is an 8-bit SAR ADC? A successive-approximation register ADC is a type of Nyquist-rate data converter that walks an internal DAC one bit per clock cycle to converge on the input voltage, producing a fixed-latency, deterministic conversion in N clock cycles for an N-bit result. SAR ADCs sit in the hierarchy: ADC -> data converter -> data acquisition IC -> signal chain -> mixed-signal semiconductor. The 8-bit resolution places the MX7575 in the precision-but-not-high-accuracy tier, well suited to digital-panel-meter replacement, instrumentation front-ends, and embedded microprocessor analog input boards. Key features include 8-bit resolution, single +5 V supply operation, parallel output interface for direct µP bus attachment, and a track-and-hold on the analog input. The /883B suffix indicates compliance with MIL-STD-883 Test Method 5008 for Class B screening (burn-in, temperature cycle, hermeticity), making the part suitable for military and aerospace programs that require flight-grade or ruggedized data converters. The architecture uses an internal 2.5 V bandgap reference and a charge-redistribution CDAC; the LSB weight is therefore (VREF / 256). External clock rates up to approximately 1.25 MHz yield the 5 µs typical conversion time advertised in the datasheet. The robust parallel interface reads the conversion result with a single CS/RD strobe, allowing easy glue-less connection to 8080/6800-style microprocessors. Typical applications include military avionics sensor digitizers, ruggedized process-control analog input modules, legacy replacement for AD7575 in flight systems, sonar and acoustic front-end sample-and-convert blocks, and instrumentation digitizers that demand a hermetic through-hole part for hi-rel assembly lines. Design tip: when migrating from the commercial MX7575 to the /883B version, the AC and DC parameters are unchanged - only the screening flow differs - so PCB layout, reference decoupling, and timing budgets are identical. Provide a clean +5 V analog supply and 100 nF decoupling on VDD and VREF pins. This page synthesizes current distributor pricing, /883B-specific screening context, drop-in equivalents and 18-CDIP PCB layout notes not found in the standalone Maxim datasheet.

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MX7582K/D

MX7582K/D - 12-Bit 4-Channel SAR ADC Die | Maxim Integrated

The Maxim Integrated MX7582K/D is a calibrated, 12-bit, 4-channel successive-approximation analog-to-digital converter (ADC) supplied in bare die (DIE) form factor. It performs a complete conversion in 100 microseconds and includes an auto-zero cycle that reduces zero-scale error to typically below 100 microvolts. The /CS, RD, and WR inputs allow direct connection to 8-bit microprocessor buses without external glue logic, and the device maintains true 12-bit performance across the full commercial operating temperature range without external trims. The /K suffix indicates the commercial temperature grade (0C to +70C), and the /D suffix denotes the die-package option sold on waffle tray or in waffle pack. An ADC (analog-to-digital converter) is a data-acquisition component that converts real-world analog signals into discrete digital codes for processing by microcontrollers, DSPs, or FPGAs. Successive-approximation-register (SAR) ADCs use a binary-search algorithm with an internal DAC and comparator to resolve N bits in N clock cycles, trading conversion speed for low power consumption and high noise immunity. The MX7582K/D is part of Maxim Integrated's CMOS 12-bit SAR portfolio alongside the MX7572 and MX7672 series, sitting at the multi-channel end of the family. Key features include 4 single-ended analog input channels multiplexed into a single 12-bit SAR core, an internal clock and reference buffer, true bipolar input capability via external scaling, and a parallel microprocessor interface with /CS, RD, WR, and INT control. The die form factor allows hybrid and MCM (multi-chip module) integrators to place the converter directly on the substrate to minimize analog trace length and improve noise immunity.

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MX7672K/D

MX7672K/D - 12-Bit 3µs SAR ADC, Die Form | Maxim Integrated

The Maxim Integrated (Analog Devices) MX7672K/D is a 12-bit, high-speed, BiCMOS successive-approximation analog-to-digital converter (ADC) supplied in unpackaged die form, performing a full conversion in as little as 3µs while consuming only 110 mW. The die-format /D suffix means the part is shipped as a bare die on a waffle pack or similar carrier for hybrid and MCM (multi-chip module) integration, rather than in a conventional plastic package. The device accepts a single analog input channel, uses an external -5 V reference, and includes a buffered reference input so one reference can drive multiple MX7672 ADCs simultaneously. The MX7672 is documented as a plug-in replacement for the AD7672, simplifying migration of legacy analog-to-digital subsystems onto Maxim/ADI silicon. An SAR ADC (successive-approximation register analog-to-digital converter) is a type of data converter that performs a binary search against the analog input using an internal DAC and comparator, producing one bit per clock cycle. SAR ADCs sit inside the broader hierarchy of analog-to-digital converters (ADC) -> data converters -> data acquisition ICs -> signal chain -> mixed-signal semiconductors. They are valued for their deterministic latency, low power, and excellent DC accuracy, making them a workhorse for industrial process control, instrumentation, and precision data-acquisition front ends. Key features of the MX7672 include 12-bit resolution with no missing codes, a 3µs typical conversion time (yielding roughly 308 kSPS throughput), an external -5 V reference input with buffer, a BiCMOS process for low-power high-speed operation, and a clock input that can be driven from a crystal or an external microprocessor clock. The architecture supports both unipolar (0 V to VREF) and bipolar (±VREF) input ranges when the device is paired with the appropriate input conditioning. The buffered reference minimizes reference-source loading and stabilizes conversion gain across temperature. Architecturally the MX7672 uses a charge-redistribution DAC array and a low-noise comparator, clocked by an internal state machine that implements the SAR algorithm. The BiCMOS process merges bipolar transistors for the reference buffer, comparator, and analog front end with CMOS logic for the SAR register and digital interface, optimizing both analog accuracy and digital power. Power dissipation of 110 mW is competitive for a 12-bit 3µs SAR ADC of this generation, and the device scales power with the clock since the SAR core only burns current during the active conversion window. Typical applications for the MX7672 include industrial process control loops, precision data-acquisition front ends, multi-channel instrumentation with external analog multiplexers, motor control feedback ADCs, weigh-scale and load-cell digitizers, hybrid/MCM signal-conditioning modules, and legacy drop-in upgrades for AD7672-based boards. The combination of high speed, low power, and single-supply-friendly operation makes it well-suited to dense multi-channel systems where one reference serves many converters. When designing with the MX7672 in die form, plan the die layout, ESD protection, wire-bond interconnect, and package selection carefully — die-format parts require hermetic or custom packaging, bond-pad ESD protection, and substrate-bias management. Ensure the external -5 V reference is low-noise and well decoupled at the reference pin; the buffered reference input is forgiving but still benefits from a 10µF local bypass capacitor. Keep analog and digital grounds separated at the die assembly and join them at a single star point to preserve 12-bit accuracy. This page synthesizes Maxim/ADI distributor pricing, same-package drop-in alternatives, hybrid/MCM design notes, and AD7672 migration guidance not found in the standalone manufacturer datasheet, providing an engineer-ready overview for selecting the MX7672K/D in legacy and new designs.

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MX7820KEWP+T

MX7820KEWP+T - 8-Bit 1.3µs ADC w/ Reference & T/H | Maxim

The Maxim Integrated MX7820KEWP+T is a 20-pin SOIC-packaged 8-bit CMOS analog-to-digital converter with a 1.3 µs conversion time, an internal 2.5 V voltage reference, and an on-chip track-and-hold amplifier. It operates from a single +5 V supply, accepts a 0 V to VREF analog input, and delivers 8-bit resolution at throughputs up to 500 ksps (typical). A flash-method ADC (sometimes called a parallel ADC) is a converter architecture that uses one comparator per output code level, completing a conversion in essentially one clock cycle. This architecture sits in the hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. The MX7820 family combines a high-speed analog front-end (track-and-hold + comparator ladder) with a precision bandgap reference, replacing a typical design that would otherwise require an external ADC plus separate reference plus external sample-and-hold. Key features include 1.3 µs typical conversion time (RD-mode), an internal 2.5 V reference (VREF) with ±25 mV initial accuracy, a track-and-hold input stage supporting signals up to the conversion rate, and a simple parallel microprocessor interface (RD, WR, CS, mode-control pins). The SOIC-20 wide-body package (KEWP suffix) is footprint-compatible with the original Maxim MX7820 and with the Maxim MX7821 family of pin-compatible 8-bit ADCs. An internal oscillator eliminates the need for an external clock source in stand-alone mode. At a 500 ksps throughput, the MX7820 typically consumes 60 mW from a +5 V supply. Standby current drops below 1 µA when CS is held high, making the part suitable for battery-powered data acquisition subsystems that wake periodically to digitize a sensor channel. Typical applications include industrial process control front-ends, portable data loggers, and digital panel-meter / instrumentation A/D front-ends. The 8-bit resolution and 1.3 µs throughput align with legacy sensor interface boards in factory automation where MX7820 sockets are already designed in. The internal 2.5 V reference simplifies bill-of-materials versus ADC-only parts that require an external ADR03 or LM4040 reference. When designing with MX7820KEWP+T, ensure VREF decoupling uses a 10 µF tantalum plus 0.1 µF ceramic within 5 mm of the REF pin. The track-and-hold input requires a low-impedance drive (< 50 Ω) for full-accuracy conversion - add a wideband op-amp buffer such as the MAX410 if the source impedance is above 1 kΩ. Keep digital and analog grounds separate and tie them at a single point under the IC. This page synthesizes distributor pricing, parametric comparison with pin-compatible same-family parts, and practical layout guidance beyond what the original Maxim datasheet provides.

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MX7821K/D

MX7821K/D - 660ns 8-Bit ADC Half-Flash Die | Maxim Integrated

The Analog Devices (formerly Maxim Integrated) MX7821K/D is a high-speed, microprocessor-compatible 8-bit analog-to-digital converter (ADC) supplied as a bare die (waffle pack / unsawn wafer) using a half-flash conversion architecture. Housed in a 20-terminal DIE package (rectangular, NO LEAD), it delivers 660ns typical conversion time versus 1.36us for the industry-standard 7820, making it a drop-in performance upgrade for legacy 7820 designs. It features an on-chip track-and-hold input stage and an 8-bit parallel microprocessor interface. An ADC (analog-to-digital converter) is a semiconductor device that converts a continuous analog voltage on its input pin into a discrete digital code at its output. ADC devices sit within the data-converter product hierarchy (ADC -> data converter -> mixed-signal IC -> semiconductor). The MX7821's half-flash architecture uses two 4-bit flash ADCs and a DAC to perform an 8-bit conversion in approximately 15 clock cycles, balancing conversion speed against die area and power consumption. The K temperature grade and the /D (die-level) designation indicate commercial-temperature operation and bare-die shipping format. Key features include 660ns conversion time, a built-in track-and-hold for accurate sampling of fast-moving signals, an on-chip input multiplexer supporting single-ended or differential inputs, and a high-speed parallel interface compatible with 8-bit microprocessors. The half-flash topology reduces switching transients compared to a full-flash converter, simplifying analog-input filtering. For design engineers, the MX7821K/D is intended for OEM designs requiring high-throughput analog signal acquisition such as instrumentation front-ends, digital oscilloscope digitizers, and process-control front ends. The bare-die format allows direct chip-on-board (COB) or hybrid-module integration, eliminating package parasitics and shortening the analog-input trace length, which is critical at the part's native conversion bandwidth. When using a bare-die ADC, engineers must design bond-pad layouts and apply known-good-die (KGD) handling procedures. Designers familiar with the 7820 can retain their analog front-end and digital-interface schematics and simply lower the conversion-time clocking budget to benefit from the MX7821's higher throughput without a PCB rework on a packaged variant. This page consolidates distributor availability, drop-in die/package alternatives, and design notes that are not present in the manufacturer datasheet.

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MX7824KN+

MX7824KN+ - 8-Bit 4-Ch High-Speed CMOS ADC | Maxim Integrated

The Maxim Integrated MX7824KN+ is a high-speed, 8-bit CMOS analog-to-digital converter (ADC) with a 4-channel analog input multiplexer, housed in a 24-pin plastic DIP (0.300 inch, 7.62 mm) through-hole package. The converter uses a half-flash (two-step flash) architecture that delivers a 2.5 µs per-channel conversion rate, including track-and-hold acquisition, with a single +5 V supply. The four analog input channels are multiplexed, and the device provides a track-and-hold function capable of digitizing full-scale input signals up to the supply rails. A flash ADC is a type of analog-to-digital converter that uses a parallel bank of comparators and a resistor ladder to convert an analog voltage to a digital code in a single step. The MX7824KN+ uses a half-flash (or two-step) topology, which is a hybrid of flash and successive-approximation architectures. It performs a coarse conversion first, then a fine conversion on the residue, effectively halving the comparator count of a full-flash design while keeping conversion time fast. This places it in the broader hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. Half-flash ADCs are valued in mid-speed embedded designs for their combination of speed, low pin count, and low cost compared to full-flash or pipeline converters. Key features include 8-bit resolution, four single-ended analog inputs, an on-chip track-and-hold, three-state latched outputs that connect directly to microprocessor data buses, and TTL/CMOS-compatible digital I/O. The device operates from a single +5 V supply and supports a commercial temperature grade (0 °C to +70 °C). The + suffix in the MPN indicates lead-free, RoHS-compliant lead finish. The MX7824KN+ and its MX7828 sibling are pin-compatible with the Analog Devices AD7824 and AD7828, which gives designers a second-source option. The MAX154 and MAX158 also share this pinout but integrate internal references. Internally, the half-flash conversion technique halves the comparator count compared with a full-flash ADC, lowering both power and noise. Typical applications include data acquisition systems, process control front-ends, multiplexed sensor monitoring, portable instrumentation, and embedded microprocessor analog interfaces. The 2.5 µs conversion time is well-suited to monitoring slowly varying signals such as temperature, pressure, and potentiometric position, or to multiplexing several transducers into a single MCU ADC channel when higher throughput is required than the MCU's internal ADC can deliver. A key design consideration is that the +5 V single-supply operation simplifies power trees in 5 V digital systems but limits input range to roughly 0 V to 5 V; for bipolar or larger signals, add an external input signal-conditioning front end. For new designs, the wider 8-channel MX7828KN+ may be preferred if more analog inputs are needed, but it shares the same pin footprint and software interface. This page consolidates distributor pricing, drop-in pin-compatible alternatives including the AD7824BQ and AD7824KNZ from Analog Devices, and practical design notes that are not duplicated in the manufacturer datasheet alone.

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MX7824UQ/883B

MX7824UQ/883B - 8-Bit 4-Ch High-Speed ADC | Maxim Integrated CDIP-24

The Analog Devices / Maxim Integrated MX7824UQ/883B is an 8-bit, 4-channel, high-speed CMOS analog-to-digital converter (ADC) with an on-chip track-and-hold stage, housed in a 24-pin ceramic DIP (CDIP-24) windowed package and qualified to MIL-STD-883 Class B. The part provides a single-channel conversion time of 2.5 us and uses a flash (half-flash) architecture for low-latency digitisation of multiplexed analog signals in defense, instrumentation, and process-control systems. An ADC (analog-to-digital converter) is a semiconductor device that converts continuous analog voltages into discrete digital codes so that a microcontroller, FPGA, or DSP can read real-world signals. The MX7824 belongs to the successive-approximation / half-flash ADC family, sits inside the broader data-converter hierarchy (ADC -> data converter -> mixed-signal IC), and is specifically designed for multi-channel data-acquisition front-ends where several sensors must share one converter. The 4-input analog multiplexer is integrated on the die, which saves board area and simplifies firmware channel sequencing versus a discrete MUX-plus-ADC design. Key features include 2.5 us conversion time per channel, 4 single-ended analog inputs with channel-selection logic, an internal or external reference option, and TTL/CMOS-compatible digital outputs. The half-flash architecture halves the comparator count versus a true flash ADC, reducing power consumption while preserving high throughput. The /883B suffix indicates MIL-STD-883 Class B screening for military and aerospace applications, including hermetic ceramic packaging, burn-in, and full temperature testing from -55C to +125C. Typical applications include military and avionics data-acquisition systems, industrial process-control front ends, medical imaging front-ends, and legacy replacement of older AD570/AD571/AD573-era ADCs in defense upgrades. The CDIP-24 windowed package is also preferred for high-reliability retrofit designs where through-hole lead-form robustness and visual die inspection are required. When designing with this part, leave at least 1 uF of decoupling on the analog VDD pin and route analog grounds separately from digital grounds. The internal reference can be overdriven by an external 2.5V reference for absolute-accuracy applications; otherwise the on-chip reference simplifies BOM and layout. This page synthesises distributor pricing, MIL-STD-883 cross-reference alternatives, and practical design notes for the MX7824UQ/883B that are not aggregated on a single manufacturer or distributor page.

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