10AS057K2F35E2LG vs 10AS057K3F35E2LG 比較
詳細な並列比較: 10AS057K2F35E2LG メーカー: Intel および 10AS057K3F35E2LG メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | 10AS057K2F35E2LG | 10AS057K3F35E2LG |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $3,450.00 | $2,950.00 |
| Family | Arria 10 SX SoC FPGA | — |
| Logic Elements | 570,000 | 570,000 |
| Process Node | TSMC 20 nm | 20 nm |
| HPS Cores | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Max Frequency | 1.5 GHz | — |
| DSP Blocks | [DATA_NEEDED: 18x19 multiplier count] | — |
| Embedded Memory (M20K) | [DATA_NEEDED: M20K block count and total bits] | — |
| Transceivers | Up to 24 channels, up to 17.4 Gbps | — |
| PCIe Hard IP | Gen3 x4 (rootport/endpoint) | — |
| User I/Os | 396 | — |
| パッケージ | 1152-ball FCBGA, 35 mm x 35 mm, 1.0 mm pitch | 1152-pin FCBGA, F35 (35x35 mm) |
| Speed Grade | E2 (commercial/extended) | K3 |
| 動作温度 | -40C to +100C (extended-industrial screening) | — |
| Configuration | SRAM-based, partial reconfiguration, SEU mitigation, ECC | — |
| Memory Interfaces | DDR3/DDR4 with hard PHY (HPS + FPGA) | — |
| RoHS ステータス | Compliant | Compliant |
| Lead-Free | Yes | — |
| Device Family | — | Arria 10 SX |
| Product Type | — | System-on-Chip (SoC) FPGA |
| Processor Cores | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Processor Clock | — | 1.5 GHz |
| Core Voltage | — | 0.9 V |
| User I/O Count | — | 396 |
| Device Designation | — | E2 |
| 実装タイプ | — | Surface Mount (BGA) |
| Terminal Pitch | — | 1.0 mm |
| Hard Processor System | — | Yes - ARM Cortex-A9 MPCore |