10AS057K2F35E2SG vs 10AS057K2F35I2SG 比較
詳細な並列比較: 10AS057K2F35E2SG メーカー: Intel および 10AS057K2F35I2SG メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | 10AS057K2F35E2SG | 10AS057K2F35I2SG |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $2,304.55 | $3,198.40 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX SoC FPGA |
| Logic Elements | 570,000 | 570K |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count for 570K LE Arria 10 SX] | — |
| Embedded Memory (M20K blocks) | [DATA_NEEDED: M20K count for 570K LE] | — |
| Embedded Memory (MLAB bits) | [DATA_NEEDED: MLAB bits for 570K LE] | — |
| DSP Blocks (18x19 Multipliers) | 1,568 | — |
| HPS Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Max Frequency | 1.5 GHz | — |
| Maximum User I/O | 396 | — |
| Transceiver Count (GX/SX) | 24 | — |
| Transceiver Max Data Rate | 17.4 Gbps | — |
| Hard PCIe Blocks | Gen2/Gen3 x4/x8 IP | — |
| パッケージ | 1152-FBGA, FC (35x35 mm) | 1152-ball FC-FBGA (F35), 35x35 mm |
| Speed Grade | E2 (mid-tier) | -2 |
| 動作温度 | [DATA_NEEDED: commercial/industrial grade range] | -40C to +100C (Industrial) |
| Process Node | 20 nm (TSMC) | 20 nm TSMC |
| 実装タイプ | Surface Mount (FCBGA) | Surface Mount (BGA) |
| RoHS ステータス | Compliant (lead-free) | Compliant (lead-free finish) |
| MSLレベル | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] |
| Processor Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Core Frequency | — | 1.5 GHz |
| User I/O Count | — | 396 (per Heisener parametric data) |
| Transceivers | — | [DATA_NEEDED: transceiver count and max data rate] |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Embedded Memory | — | [DATA_NEEDED: M20K / MLAB bit count] |
| HPS Peripherals | — | EMAC, USB 2.0 OTG, SPI, I2C, NAND/NOR flash controllers, SD/MMC |
| Memory Interfaces | — | DDR3/DDR4/LPDDR3 hard controllers (Arria 10 HPS) |
| Configuration | — | FPGA + HPS independent / coordinated boot |