10AS066H1F34E1HG vs 10AS066H3F34I2LG 比較
詳細な並列比較: 10AS066H1F34E1HG メーカー: Altera および 10AS066H3F34I2LG メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | 10AS066H1F34E1HG | 10AS066H3F34I2LG |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $3,900.00 | $0.00 |
| Family | Arria 10 SX | — |
| Device Variant | 10AS066 | — |
| Logic Elements | 660,000 | 660000 |
| Processor Hard Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Core Frequency (max) | 1.5 GHz | — |
| パッケージ | 1152-FCBGA (F34), 35 x 35 mm | — |
| User I/O Count | 492 | — |
| 動作温度 | -40C to +100C (Industrial / E1) | — |
| Speed Grade | H1 | — |
| Memory Interface | DDR4/DDR3 with ECC (via HPS + FPGA fabric) | — |
| Process Node | 20 nm | — |
| RoHS ステータス | Compliant | [DATA_NEEDED: RoHS status] |
| 実装タイプ | Surface Mount (flip-chip BGA) | Surface Mount |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| HPS Architecture | 32-bit ARM Cortex-A9 dual-core, NEON, CoreSight debug | — |
| Device Type | System on Chip (SoC) FPGA | — |
| Transceivers | [DATA_NEEDED: number of transceiver channels] | — |
| Product Type | — | System-on-chip FPGA |
| FPGA Family | — | Arria 10 SX |
| Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Stated Frequency | — | 1.5 GHz |
| I/O Count | — | 492 I/O |
| Technology | — | 20 nm |
| Core Voltage Snippet | — | 0.9 V |
| Cell Count | — | 660000 cells |
| Package Pin Count | — | 1152 pins |
| Package Type | — | FCBGA |
| Package Dimensions | — | 35 mm x 35 mm |
| Terminal Form | — | Ball |
| Temperature Grade | — | Industrial |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |