10CL055YU484A7G vs 10CL055YU484I7G 比較
詳細な並列比較: 10CL055YU484A7G メーカー: Intel および 10CL055YU484I7G メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | 10CL055YU484A7G | 10CL055YU484I7G |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $124.30 | $35.10 |
| Series | Cyclone 10 LP | — |
| Logic Elements | 55,856 LE | 55,856 |
| Embedded Memory | 2,396,160 bits (2.29 Mbit) | — |
| Number of User I/Os | 321 I/O | — |
| Package Type | 484-UBGA (Ultra FineLine BGA) | — |
| 実装タイプ | Surface Mount (SMD/SMT) | — |
| Operating Supply Voltage (Core) | 1.2 V | — |
| I/O Standard Support | LVCMOS / LVTTL (3.3 V, 2.5 V, 1.8 V, 1.5 V) | — |
| Minimum Operating Temperature | -40 C | — |
| Maximum Operating Temperature | +85 C (industrial) | — |
| Speed Grade | A7 (standard performance) | -7 (I7, industrial) |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Embedded 18x18 Multipliers | Yes (DSP blocks) | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Configuration Method | Serial / JTAG / Active Serial (AS) | — |
| RoHS ステータス | Compliant | Compliant |
| Process Technology | 60 nm | 60 nm low-power CMOS |
| Family | — | Cyclone 10 LP |
| Embedded Memory Bits | — | 2,396,160 bits |
| M9K Memory Blocks | — | 260 |
| Maximum User I/Os | — | 321 |
| DSP Blocks (18x18 multipliers) | — | 156 |
| PLLs | — | 4 |
| Global Clock Networks | — | 20 |
| パッケージ | — | 484-ball UBGA (Ultra FineLine BGA), 19 mm x 19 mm |
| 動作接合温度 | — | -40C to +100C |
| Core Voltage (VCCINT) | — | 1.0V (typical), 1.1V nominal |
| I/O Voltage (VCCIO) | — | 1.2V to 3.3V (bank-dependent) |
| Configuration Modes | — | JTAG, AS, PS, FPP |
| LVDS Data Rate | — | Up to 875 Mbps per channel |
| MSLレベル | — | 3 (per JEDEC J-STD-020) |