10CL055YU484I7G vs 10CL055ZU484I8G 比較
詳細な並列比較: 10CL055YU484I7G メーカー: Altera および 10CL055ZU484I8G メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | 10CL055YU484I7G | 10CL055ZU484I8G |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $35.10 | $35.50 |
| Family | Cyclone 10 LP | Cyclone 10 LP |
| Logic Elements | 55,856 | — |
| Embedded Memory Bits | 2,396,160 bits | — |
| M9K Memory Blocks | 260 | — |
| Maximum User I/Os | 321 | — |
| DSP Blocks (18x18 multipliers) | 156 | — |
| PLLs | 4 | 4 (max 6 clock networks) |
| Global Clock Networks | 20 | 20 |
| Process Technology | 60 nm low-power CMOS | 60 nm TSMC low-power |
| パッケージ | 484-ball UBGA (Ultra FineLine BGA), 19 mm x 19 mm | 484-pin Ultra FineLine BGA (UBGA), ZU484 |
| Speed Grade | -7 (I7, industrial) | I8 (industrial speed grade 8) |
| 動作接合温度 | -40C to +100C | — |
| Core Voltage (VCCINT) | 1.0V (typical), 1.1V nominal | — |
| I/O Voltage (VCCIO) | 1.2V to 3.3V (bank-dependent) | — |
| Configuration Modes | JTAG, AS, PS, FPP | — |
| LVDS Data Rate | Up to 875 Mbps per channel | — |
| RoHS ステータス | Compliant | — |
| MSLレベル | 3 (per JEDEC J-STD-020) | — |
| Series | — | Cyclone 10 LP |
| Logic Elements (LE) | — | 55,856 |
| Embedded Memory | — | 2,396,160 bits (approx. 2.4 Mb) |
| Maximum User I/O | — | 321 |
| Number of Logic Array Blocks (LABs) | — | 3491 |
| Number of M9K Memory Blocks | — | 260 |
| Embedded 18x18 Multipliers | — | 156 |
| Ball Pitch | — | 0.8 mm |
| 動作温度 | — | -40C to +100C (industrial) |
| Supply Voltage (Core) | — | [DATA_NEEDED: core VCC] |
| 実装タイプ | — | Surface Mount |
| Compliance | — | RoHS Compliant |
| Configuration Method | — | JTAG, Active Serial (AS), Active Parallel (AP) |