2ED21064S06JXUMA1 vs 2ED21084S06JXUMA1 比較
詳細な並列比較: 2ED21064S06JXUMA1 メーカー: Infineon および 2ED21084S06JXUMA1 メーカー: Infineon。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | 2ED21064S06JXUMA1 | 2ED21084S06JXUMA1 |
|---|---|---|
| ブランド | Infineon | Infineon |
| カテゴリ | Power MOSFET Drivers | Power MOSFET Drivers |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.85 | $0.55 |
| 機能 | High-Side and Low-Side Gate Driver | Half-bridge gate driver |
| Configuration | Half-Bridge (2 outputs, non-inverting) | — |
| トポロジー | High-Side, Low-Side with integrated bootstrap diode | Half-bridge (high-side + low-side) |
| Maximum Offset / Boot Voltage | 650 V | — |
| Supply Voltage (VCC) | 10 V to 20 V | — |
| Source Current (typical) | 0.29 A | 0.29 A |
| Sink Current (typical) | 0.7 A | 0.7 A |
| Rise Time (typical) | [DATA_NEEDED: rise time] | — |
| Fall Time (typical) | [DATA_NEEDED: fall time] | — |
| Propagation Delay (typical) | 100 ns | — |
| Channel-to-Channel Delay Match | [DATA_NEEDED: channel-to-channel delay match] | — |
| Under-Voltage Lockout | Yes (both channels) | — |
| Bootstrap Diode | Integrated | Integrated |
| Input Logic Compatibility | 3.3 V / 5 V CMOS | — |
| 動作温度 | -40C to +125C | -40C to +125C |
| パッケージ | PG-DSO-14 (14-pin SOIC) | PG-DSO-14-49 (14-pin wide-body SOIC) |
| 実装タイプ | Surface Mount | Surface Mount |
| MSLレベル | [DATA_NEEDED: MSL level] | 3 |
| RoHS ステータス | ROHS3 Compliant | Compliant |
| Negative Gate Drive Robustness | -0.7 V | — |
| High-side Offset Voltage (max) | — | 650 V |
| VCC Supply Voltage | — | 10 V to 20 V |
| Propagation Delay Rise (typical) | — | 100 ns |
| Propagation Delay Fall (typical) | — | 35 ns |
| Input Logic | — | Non-inverting (HIN/LIN) |
| UVLO (VCC) | — | [DATA_NEEDED: VCC UVLO threshold] |
| UVLO (VBS) | — | [DATA_NEEDED: VBS UVLO threshold] |