5CSEBA2U19C6N vs 5CSEBA2U19C7N 比較
詳細な並列比較: 5CSEBA2U19C6N メーカー: Intel および 5CSEBA2U19C7N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | 5CSEBA2U19C6N | 5CSEBA2U19C7N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $74.60 | $16.90 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 25 K | 25,000 LE |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Clock Frequency | 925 MHz | 925 MHz |
| DSP Blocks | Variable-precision DSP | 66 (variable-precision 18x18) |
| パッケージ | 484-pin UBGA (19x19 mm) | 484-pin UBGA (19x19 mm, 1.0 mm pitch) |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| Operating Temperature Grade | Commercial (other) | — |
| Memory Interfaces | DDR2, DDR3, LPDDR2 with ECC | — |
| HPS Peripherals | GbE, USB 2.0 OTG, SATA, CAN, UART, SPI, I2C, SD/SDIO/MMC | — |
| L2 Cache | 512 KB shared | 512 KB shared |
| L1 Cache per Core | 32 KB I-cache + 32 KB D-cache | — |
| FPGA-to-HPS Bridges | AXI-32/AXI-64, FPGA-to-SDRAM ports | — |
| Process Technology | TSMC 28 nm low-power | TSMC 28 nm low-power |
| RoHS ステータス | Compliant | Compliant |
| Adaptive Logic Modules (ALMs) | — | 9,430 ALM |
| ALUTs | — | 9,430 |
| Embedded Memory | — | 1,400 Kbits (M9K + MLAB) |
| HPS Processor | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| L1 Cache (per core) | — | 32 KB I-cache + 32 KB D-cache |
| User I/O Pins | — | [DATA_NEEDED: exact user I/O count] |
| Speed Grade | — | C7 |
| 動作温度 | — | Commercial / Industrial (TJ from data) |
| MSLレベル | — | [DATA_NEEDED: MSL rating] |