A3PE600-1FGG484I vs A3PE600-2FG484I 比較
詳細な並列比較: A3PE600-1FGG484I メーカー: Microchip Technology および A3PE600-2FG484I メーカー: Microchip Technology。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Microchip Technology
A3PE600-1FGG484I - ProASIC3E 600K-Gate Flash FPGA | Microchip
A3PE600-1FGG484I ✓ 生産中Microchip Technology
A3PE600-2FG484I - 600K-Gate Flash FPGA 484-BGA | Microchip
A3PE600-2FG484I ✓ 生産中仕様比較
| パラメータ | A3PE600-1FGG484I | A3PE600-2FG484I |
|---|---|---|
| ブランド | Microchip Technology | Microchip Technology |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $42.40 | $79.90 |
| Family | ProASIC3E | ProASIC3E |
| System Gates | 600000 gates | 600000 |
| Logic Elements | ProASIC3, 7KLEs class fabric | — |
| Maximum System Frequency | 272 MHz (speed grade -1) | 310 MHz |
| User I/O | 270 | — |
| Embedded SRAM | 110592 bits | — |
| Core Supply Voltage | 1.5 V | — |
| Process Technology | 130 nm, 7-layer metal (6 copper) flash-based CMOS | 130 nm CMOS flash |
| Configuration Memory | On-chip flash (nonvolatile, live at power-up) | Nonvolatile Flash (single chip, live at power-up) |
| パッケージ | 484-ball FBGA (FGG484), 1 mm pitch | 484-ball FBGA (FG484) |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | Industrial (I suffix); die-level commercial rating 0C to 70C per digichip listing | -40C to +100C (Industrial, I suffix) |
| Logic Family | CMOS | — |
| Soft Processor Support | Optional soft ARM support (per family datasheet) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | Compliant (RoHS: Yes) |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Configurable Logic Blocks (CLBs) | — | 13824 |
| Total User I/O | — | 270 |
| Core Voltage | — | 1.5 V |
| Speed Grade | — | -2 (fastest standard grade) |
| HTS Code | — | 8542310060 |
| ECCN | — | 3A991.d |
| Country of Origin | — | PH (Philippines) |
| Supplier Standard Pack | — | 60 |
| Embedded Block RAM | — | [DATA_NEEDED: embedded block RAM capacity] |
| PLL Count | — | [DATA_NEEDED: number of PLLs] |