ATSAMA5D41A-CU vs ATSAMA5D42A-CU 比較
詳細な並列比較: ATSAMA5D41A-CU メーカー: Microchip Technology および ATSAMA5D42A-CU メーカー: Microchip Technology。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Microchip Technology
ATSAMA5D41A-CU - 600MHz ARM Cortex-A5 MPU, LFBGA-289 | Microchip
ATSAMA5D41A-CU ✓ 生産中Microchip Technology
ATSAMA5D42A-CU - ARM Cortex-A5 MPU 600MHz 361-TFBGA | Microchip
ATSAMA5D42A-CU ✓ 生産中仕様比較
| パラメータ | ATSAMA5D41A-CU | ATSAMA5D42A-CU |
|---|---|---|
| ブランド | Microchip Technology | Microchip Technology |
| カテゴリ | Microcontrollers | Microcontrollers |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $14.30 | $18.24 |
| Core Architecture | ARM Cortex-A5 (ARMv7-A) with NEON SIMD and VFPv4 | ARMv7-A with Thumb-2, NEON, FPU, MMU |
| Maximum Core Frequency | 600 MHz | — |
| Core Count | 1 (Single-core) | — |
| データバス幅 | 32-bit | 32-bit |
| L1 Instruction Cache | [DATA_NEEDED: L1 I-cache size] | 32 KByte |
| L1 Data Cache | [DATA_NEEDED: L1 D-cache size] | 32 KByte |
| L2 Cache | 128 KB | 128 KByte |
| On-chip ROM | 128 KB | — |
| Supply Voltage I/O | 1.2 V / 1.8 V / 3.3 V | — |
| Supply Voltage Core | 1.1 V to 1.32 V | — |
| 動作温度 | -40 C to +85 C (Industrial) | -40C to +85C (industrial) |
| パッケージ | 289-LFBGA (14x14 mm, 0.8 mm pitch) | 361-TFBGA (16x16 mm, 0.8 mm pitch) |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| USB Interfaces | 3 x USB 2.0 (2 Host + 1 Device, or 3 Host) | — |
| Ethernet | 2 x GMAC (10/100/1000 Mbps with external PHY) | — |
| ADC | 5-channel 10-bit with resistive touchscreen controller | — |
| External Memory Support | DDR2/LPDDR/LPDDR2, NAND/NOR flash with ECC | — |
| Video Decode | 720p H.264 up to 30 fps | — |
| Security | AES, 3DES, SHA-1/224/256, Integrity Check Monitor (ICM) | — |
| RoHS ステータス | Compliant | Compliant |
| Core Processor | — | ARM Cortex-A5 |
| Number of Cores | — | 1 |
| Maximum Clock Speed | — | 600 MHz |
| Internal SRAM | — | 128 KByte |
| Operating Voltage (Core) | — | 1.2 V to 1.32 V |
| Operating Voltage (I/O) | — | 1.8 V / 3.3 V |
| DDR Memory Controller | — | DDR2/LPDDR/DDR3, 16-bit data bus |
| MSLレベル | — | 3 (per JEDEC J-STD-020) |