EP1AGX35CF780I6N vs EP1AGX35DF780C5N 比較
詳細な並列比較: EP1AGX35CF780I6N メーカー: Intel および EP1AGX35DF780C5N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1AGX35CF780I6N | EP1AGX35DF780C5N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $278.75 | $198.00 |
| Manufacturer | Intel (formerly Altera) | — |
| Family | Arria GX | Arria GX |
| Device Series | EP1AGX35 | — |
| Logic Elements (LE) | 33,250 | 33,520 |
| Logic Array Blocks (LABs) | 33,520 | — |
| Process Technology | 90 nm | 90 nm SRAM-based |
| Core Voltage | 1.2 V | — |
| Embedded Transceivers | Up to 3.125 Gbps | — |
| Transceiver Count | [DATA_NEEDED: transceiver count for EP1AGX35 in F780 package] | — |
| パッケージ | 780-pin Flip-Chip BGA (FC-FBGA) | 780-ball FineLine BGA (FBGA-780) |
| Package Code | BGA-780 | — |
| Package Dimensions | 29 x 29 mm | — |
| Terminal Pitch | 1.00 mm | — |
| 実装タイプ | Surface Mount | — |
| Terminal Form | Ball | — |
| Terminal Shape | [DATA_NEEDED: terminal shape - confirmed SQUARE package per partstack] | — |
| Temperature Grade | Industrial | -40C to +125C (industrial) |
| 動作温度範囲 | -40C to +100C (Industrial, I6 speed grade) | — |
| Speed Grade | I6 | C5 (commercial, speed grade 5) |
| RoHS ステータス | [DATA_NEEDED: RoHS status not stated in verified sources] | Compliant |
| Series | — | Arria GX FPGA |
| Embedded Memory Bits | — | 1,348,416 |
| Dedicated 18x18 Multipliers | — | 341 |
| Embedded Memory Blocks | — | M512 / M4K / M-RAM |
| DSP Blocks | — | Yes (each block = 4 multipliers + adder/accumulator) |
| Multi-Gigabit Transceivers | — | Up to 8 channels, 600 Mbps to 3.125 Gbps |
| On-chip PLLs | — | 8 (4 support DPA) |
| User I/O Pins | — | [DATA_NEEDED: exact user I/O count for 780-BGA variant] |
| Supported Protocols | — | PCI Express Gen1, Gigabit Ethernet, Serial RapidIO, SDI/HD-SDI, XAUI |
| Hard IP | — | PCIe PIPE, GIGE MAC, DPA |
| Configuration Method | — | Passive serial, fast passive parallel, JTAG |