EP1AGX90EF1152C6 vs EP1AGX60EF1152I6N 比較
詳細な並列比較: EP1AGX90EF1152C6 メーカー: Intel および EP1AGX60EF1152I6N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EP1AGX60EF1152I6N - Arria GX 60 FPGA, 60K LE, 1152-BGA | Intel / Altera
EP1AGX60EF1152I6N Obsolete仕様比較
| パラメータ | EP1AGX90EF1152C6 | EP1AGX60EF1152I6N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $525.00 | $142.00 |
| Family | Arria GX | Arria GX FPGA |
| Logic Elements (LE) | 90,220 | 60,100 |
| Adaptive Logic Modules (ALM) | [DATA_NEEDED: ALM count] | — |
| Logic Array Blocks (LAB) | 4,511 | — |
| Embedded Memory | 4,477,824 bits (4.4 Mbit) | 2,528,640 bits (≈2.4 Mbit) |
| User I/Os | 538 | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: multiplier count] | — |
| Transceiver Channels | 4 (3.125 Gbps per channel) | 12 (3.125 Gbps, embedded CDR/SERDES) |
| Transceiver Data Rate | Up to 3.125 Gbps | — |
| Process Technology | 90 nm | — |
| Core Voltage | 1.2 V | — |
| パッケージ | 1152-ball FBGA (FineLine BGA) | 1152-BBGA (FBGA-1152, 35 × 35 mm, 1.0 mm pitch) |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| 動作温度 | 0C to +85C (commercial) | -40 °C to +100 °C (Industrial, suffix I) |
| Configuration Interface | JTAG, Passive Serial, EPCS | — |
| PLLs | [DATA_NEEDED: PLL count] | 4 (one per quadrant) plus transceiver PLLs |
| RoHS ステータス | Compliant | Compliant (per distributor listing) |
| Lead-Free | Yes | — |
| Supported Protocols | PCI Express, Gigabit Ethernet, SDI, XAUI, SerialLite II, Serial RapidIO | — |
| Series | — | Arria GX |
| LABs / CLBs | — | 3,005 |
| Total RAM Bits | — | 2,528,640 |
| User I/O Count | — | 514 |
| 18 × 18 Hardware Multipliers | — | 252 |
| Speed Grade | — | 6 |
| Process Node | — | 90 nm |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCCINT/VCC typical value] |
| Hard IP | — | PCI Express ×1/×4, Gigabit Ethernet MAC, 8B/10B encoder/decoder |
| Memory Interfaces | — | DDR, DDR2, QDRII, RLDRAM (external memory controller) |
| MSLレベル | — | 3 (per JEDEC J-STD-020) |