EP1K100QI208-2 vs EP1K100QI208-3 比較
詳細な並列比較: EP1K100QI208-2 メーカー: Altera および EP1K100QI208-3 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1K100QI208-2 | EP1K100QI208-3 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $23.90 | $19.75 |
| Family | ACEX-1K | ACEX 1K (FLEX 10K) |
| Logic Elements | 4,992 cells | — |
| System Gates | 100,000 | — |
| Logic Array Blocks (LABs) | 624 | — |
| Embedded Memory (EAB) | 49,152 bits | — |
| User I/Os | 147 | — |
| Maximum Operating Frequency | 250 MHz | — |
| Core Voltage (VCCINT) | 2.5 V | — |
| Process Technology | 0.22 umm CMOS SRAM | — |
| パッケージ | 208-pin PQFP (BFQFP) | 208-pin PQFP (QFP, gull-wing) |
| Pitch | 0.5 mm | — |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | -40C to +85C (Industrial) | -40 °C to +85 °C (industrial) |
| Configuration Interface | JTAG (IEEE 1149.1) / serial / EPC2 | — |
| Global Clock Networks | 4 | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, 5V tolerant | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Logic Cells | — | 4,992 |
| Configurable Logic Blocks (CLBs) | — | 624 |
| Approximate System Gates | — | 100,000 |
| User I/O Pins | — | 147 |
| Dedicated Inputs | — | 6 |
| Core Supply Voltage (VCCINT) | — | 2.5 V nominal (max 2.625 V) |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO min/max range] |
| Speed Grade | — | -3 (fastest) |
| Terminal Count | — | 208 |
| Terminal Form | — | Gull Wing |
| Package Code | — | QFP (Power Quad Flat Pack) |
| Configuration Method | — | SRAM, serial/parallel (EPC2/EPC4 supported) |
| Embedded Memory | — | EAB blocks (RAM/ROM/multiplier) |