EP1K100QI208-2 vs EP1K50QI208-2 比較
詳細な並列比較: EP1K100QI208-2 メーカー: Altera および EP1K50QI208-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1K100QI208-2 | EP1K50QI208-2 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $23.90 | $17.20 |
| Family | ACEX-1K | — |
| Logic Elements | 4,992 cells | — |
| System Gates | 100,000 | — |
| Logic Array Blocks (LABs) | 624 | 360 |
| Embedded Memory (EAB) | 49,152 bits | — |
| User I/Os | 147 | — |
| Maximum Operating Frequency | 250 MHz | — |
| Core Voltage (VCCINT) | 2.5 V | — |
| Process Technology | 0.22 umm CMOS SRAM | CMOS, SRAM-based configuration |
| パッケージ | 208-pin PQFP (BFQFP) | — |
| Pitch | 0.5 mm | — |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| Configuration Interface | JTAG (IEEE 1149.1) / serial / EPC2 | — |
| Global Clock Networks | 4 | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, 5V tolerant | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Series | — | ACEX 1K |
| Manufacturer | — | Altera (Intel) |
| Typical Gate Count | — | 50,000 gates |
| Logic Elements (LEs) | — | 2,880 |
| Embedded SRAM | — | 40,960 bits |
| Maximum User I/O Pins | — | 147 |
| Speed Grade | — | -2 |
| Core Voltage | — | 2.5 V |
| I/O Voltage Support | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Package Type | — | 208-pin PQFP (Power Quad Flat Pack) |
| Configuration Method | — | JTAG / serial configuration PROM (EPC2/EPCS) |