EP1K50QC208-3 vs EP1K100QC208-3N 比較
詳細な並列比較: EP1K50QC208-3 メーカー: Altera および EP1K100QC208-3N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1K50QC208-3 | EP1K100QC208-3N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $12.10 | $19.50 |
| Family | ACEX 1K | — |
| Logic Elements / Cells | 2,880 | — |
| Typical Gates | 50,000 | — |
| RAM Bits | 40,960 | — |
| Logic Array Blocks (LABs) | 360 | — |
| Embedded Array Blocks (EABs) | 12 | — |
| User I/O Pins | 147 | — |
| Maximum Operating Frequency | 166.67 MHz | — |
| Speed Grade | -3 | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Process Technology | 0.22 µm CMOS | — |
| パッケージ | 208-pin PQFP (BFQFP) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | Commercial (0°C to +70°C) [DATA_NEEDED: exact range] | — |
| Configuration Mode | Passive Serial, Active Serial, JTAG | — |
| I/O Standards | LVTTL, LVCMOS, PCI | — |
| Design Tool Support | Quartus II, MAX+PLUS II | — |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS certificate status] |
| Product Series | — | ACEX-1K |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Number of Logic Elements | — | 4992 |
| Number of LABs | — | 624 |
| Embedded RAM Bits | — | 49152 |
| Total Typical Gates | — | 100K |
| Number of User I/Os | — | 147 |
| I/O Supply Voltage Range | — | [DATA_NEEDED: I/O supply voltage range] |
| Maximum Internal Clock Frequency | — | 200 MHz |
| Package Type | — | 208-BFQFP |
| ピン数 | — | 208 |
| Terminal Form | — | Gull Wing |
| JTAG Boundary Scan | — | IEEE Std. 1149.1-1990 compliant built-in BST |
| Lead-Free Version | — | Yes (N suffix) |
| 動作温度範囲 | — | Commercial grade ([DATA_NEEDED: exact operating temperature range]) |
| Supported Configuration Devices | — | EPC2/EPC16 family ([DATA_NEEDED: exact ACEX-1K supported list]) |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |