EP1K50TI144-2 vs EP1K50TL144-2 比較
詳細な並列比較: EP1K50TI144-2 メーカー: Intel および EP1K50TL144-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1K50TI144-2 | EP1K50TL144-2 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.85 | $22.10 |
| Family | ACEX-1K | ACEX 1K |
| Logic Elements (LEs) | 2,880 | — |
| Typical Gates | 50,000 | 50,000 |
| Maximum User I/O | 102 | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Total RAM Bits | 40,960 | — |
| Core Supply Voltage (VCCINT) | 2.5 V (2.375 V to 2.625 V) | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Speed Grade | -2 | -2 (faster grade) |
| 動作温度 | -40 °C to +85 °C (Industrial) | — |
| パッケージ | 144-LQFP (TQFP-144) | 144-pin TQFP |
| 実装タイプ | Surface Mount | Surface Mount |
| Process Technology | SRAM-based, 0.18 µm | 0.18 um CMOS |
| Configuration Method | Passive Serial / Passive Parallel / JTAG | — |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Logic Elements | — | 2,880 |
| Embedded Memory (RAM bits) | — | 40,960 |
| User I/O Pins | — | 102 |
| Core Voltage | — | 2.5 V |
| I/O Voltage | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Temperature Grade | — | Industrial (-40C to +100C) |
| Configuration | — | JTAG in-system programmable |