EP1K50TI144-3 vs EP1K50TI144-3N 比較
詳細な並列比較: EP1K50TI144-3 メーカー: Intel および EP1K50TI144-3N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1K50TI144-3 | EP1K50TI144-3N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.40 | $19.80 |
| Family | ACEX 1K | ACEX 1K (EP1K) |
| Logic Elements (LEs) | 2,880 | — |
| Typical Gate Count | 50,000 | — |
| Configurable Logic Blocks (CLBs) | 360 | — |
| Embedded Array Blocks (EABs) | 72 | 40 (4 Kbit each) |
| Embedded RAM Bits | 40,960 | — |
| Maximum User I/O Pins | 102 | — |
| Dedicated Input Pins | 6 | — |
| Speed Grade | -3 | -3 (fastest ACEX 1K grade) |
| Propagation Delay (typical) | 12.5 ns | — |
| Supply Voltage (VCCINT) | 2.375 V to 2.625 V (2.5 V nominal) | — |
| Operating Temperature (industrial) | -40 C to +85 C | — |
| パッケージ | 144-pin PQFP (TQFP, TI suffix) | 144-pin TQFP (Industrial, Pb-free) |
| Process Technology | 0.22 µm CMOS SRAM | 0.22 µm CMOS, SRAM-based |
| Configuration Interface | JTAG (IEEE 1149.1) + serial/parallel | JTAG (IEEE 1149.1) + passive-serial |
| RoHS ステータス | [DATA_NEEDED: RoHS status of legacy ACEX 1K] | Compliant (Pb-free terminal finish, "N" suffix) |
| Series | — | EP1K50 |
| Logic Elements | — | 2,880 |
| Typical Gates | — | 50,000 |
| Embedded Memory (EAB SRAM) | — | 40,960 bits |
| Maximum User I/O | — | 102 |
| Dedicated Inputs | — | 6 |
| Core Voltage (VCCINT) | — | 2.375 V to 2.625 V (nominal 2.5 V) |
| I/O Bank Voltage (VCCIO) | — | 2.375 V to 5.0 V (multiVolt I/O) |
| Maximum Internal Frequency | — | 166.67 MHz (process node data) |
| 動作温度 | — | -40 °C to +85 °C (Industrial) |
| 実装タイプ | — | Surface Mount |
| MSLレベル | — | [DATA_NEEDED: MSL level] |
| Supply Current (typ/ICC) | — | [DATA_NEEDED: ICC standby] |