EP1M120F484C7AES vs EP1M120F484C6N 比較
詳細な並列比較: EP1M120F484C7AES メーカー: Altera および EP1M120F484C6N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1M120F484C7AES | EP1M120F484C6N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $65.80 | $56.50 |
| Series | Mercury (EP1M120) | — |
| Logic Family | CMOS | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements / Cells | 49,152 | — |
| Memory Bits | 4,800 | — |
| User I/O Pins | 303 | — |
| Total Package Pins | 484 | — |
| Package Type | FineLine BGA-484 (PBGA484) | — |
| Terminal Pitch | 1.00 mm | — |
| Supply Voltage (Core) | 1.8 V | — |
| 動作温度 | 0 C to +85 C | 0C to 85C (commercial) |
| 実装タイプ | Surface Mount | Surface Mount |
| Integrated Transceivers | Yes, with CDR up to 1.25 Gbps | — |
| Configuration Method | SRAM (volatile, requires external PROM) | — |
| RoHS ステータス | unknown | Compliant |
| Family | — | Mercury (APEX PLD platform) |
| Typical Gates | — | 120,000 |
| Logic Cells / Elements | — | 4,800 |
| Logic Array Blocks (LABs) | — | 480 |
| User I/Os | — | 303 |
| パッケージ | — | 484-ball FC-FBGA (FineLine BGA) |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Transceiver Data Rate | — | Up to 1.25 Gbps with CDR |
| Process Technology | — | CMOS |
| Architecture | — | LUT-based, optimized for high-speed interconnect |
| MultiCore Support | — | Yes (hot socketing) |
| MSLレベル | — | 3 (per JEDEC J-STD-020) |