EP1S10F672C7N vs EP1S10B672C7N 比較
詳細な並列比較: EP1S10F672C7N メーカー: Altera および EP1S10B672C7N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S10F672C7N | EP1S10B672C7N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $171.00 | $67.90 |
| Series | Stratix | — |
| Logic Elements / Cells | 10,570 | — |
| Number of LABs/CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | [DATA_NEEDED: total RAM bits] |
| Number of User I/Os | 345 | — |
| Number of Gates | [DATA_NEEDED: total gate count] | — |
| DSP Blocks | 6 | — |
| Package Type | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch | — |
| 実装タイプ | Surface Mount | — |
| Process Technology | 130 nm CMOS | — |
| Core Voltage | 1.5 V | — |
| Maximum Operating Frequency | 420.17 MHz | — |
| 動作温度 | 0C to +85C (Commercial) | — |
| Configuration Method | SRAM, JTAG, passive/active serial/parallel | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | — |
| MSLレベル | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Manufacturer | — | Intel / Altera |
| Product Family | — | Stratix |
| Logic Family | — | CMOS |
| Logic Elements/Cells | — | 10570 cells |
| Maximum Internal Clock | — | 420.17 MHz |
| Core Supply Voltage | — | 1.5 V |
| Technology Node | — | 130 nm |
| Package Code | — | BGA |
| Number of Terminals | — | 672 |
| Package Body Size | — | 35 x 35 mm |
| Ball Pitch | — | 1.27 mm |
| Package Shape | — | Square |
| Temperature Grade | — | Commercial extended, 0 to 85 C |
| Terminal Form | — | Ball |
| Configuration/JTAG | — | JTAG boundary-scan per Stratix family data sheet |
| Number of User I/O in 672-BGA | — | [DATA_NEEDED: user I/O count] |
| Embedded PLLs | — | [DATA_NEEDED: PLL count] |
| Config Device Compatibility | — | [DATA_NEEDED: supported configuration devices] |
| RoHS | — | unknown - N suffix may indicate Pb-free, not verified in fetched data |