EP1S20F484C6N vs EP1S20F484C7N 比較
詳細な並列比較: EP1S20F484C6N メーカー: Intel および EP1S20F484C7N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S20F484C6N | EP1S20F484C7N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $440.00 | $198.00 |
| Family | Stratix | Stratix |
| Logic Elements | 18,460 | 18,460 |
| Embedded Memory | 1,669,248 bits | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| User I/O Pins | 361 | 361 |
| パッケージ | 484-Ball FCBGA (23 x 23 mm, 1.0 mm pitch) | 484-FBGA (FC-BGA, 23x23 mm, 1.0 mm pitch) |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| I/O Supply Voltage | [DATA_NEEDED: I/O voltage - check datasheet] | — |
| 動作温度 | 0 C to 85 C (Commercial) | 0 °C to 85 °C (commercial) |
| Speed Grade | 6 | C7 |
| Maximum Internal Clock | 450.05 MHz | — |
| Configuration Interface | JTAG (IEEE 1149.1), Serial/Parallel (AS/PS) - EPC device compatible | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: confirm via Intel product page] | — |
| Lead-Free | [DATA_NEEDED: confirm] | — |
| Logic Array Blocks (LABs) | — | 1,846 |
| Configurable Logic Blocks (CLBs) | — | 2,132 |
| Embedded Memory (M4K blocks + RAM) | — | 1,669,248 bits |
| Maximum Internal Clock Frequency | — | 420.17 MHz |
| Lead-Free / RoHS | — | Yes (N suffix indicates lead-free) |
| Configuration Modes | — | PS, PPA, PPS, JTAG |
| Embedded Multipliers (DSP blocks) | — | Yes (18x18 multipliers) |