EP1S30F1020C5 vs EP1S30F1020C7 比較
詳細な並列比較: EP1S30F1020C5 メーカー: Intel および EP1S30F1020C7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S30F1020C5 | EP1S30F1020C7 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $99.00 | $575.00 |
| Family | Stratix | — |
| Logic Elements | 32,470 | — |
| Total Memory Bits | 3,317,184 | — |
| Total RAM Blocks | 32470 (per DigiKey descriptor) | — |
| User I/O Count | 726 | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Maximum Internal Frequency | 500 MHz | 420.17 MHz |
| Operating Temperature Grade | Commercial Extended | — |
| Speed Grade | 5 (C5) | C7 (medium speed bin) |
| Package Type | 1020-ball FC-FBGA (Flip-Chip Fine-pitch BGA) | FC-FBGA-1020 (flip-chip) |
| 実装タイプ | Surface Mount | Surface Mount |
| Configuration Method | SRAM-based, external PROM required | SRAM (AS / AP / PS / JTAG) |
| Development Tool | Quartus II (legacy) | — |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS compliance from verified data not confirmed] |
| Series | — | Stratix |
| Logic Elements / Cells | — | 32470 |
| Logic Array Blocks (LABs) | — | 3247 |
| Number of I/O | — | 726 |
| 電源電圧 | — | 1.5 V |
| 動作温度 | — | 0 C to 85 C |
| Logic Family | — | CMOS |
| Package Dimensions | — | 33 x 33 mm, 1 mm pitch |
| ピン数 | — | 1020 |
| Number of Terminals | — | 1020 |
| Terminal Form | — | Ball |