EP1S40B956C6 vs EP1S40B956C6N 比較
詳細な並列比較: EP1S40B956C6 メーカー: Intel および EP1S40B956C6N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S40B956C6 | EP1S40B956C6N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $1,078.40 | $1,050.00 |
| Family | Stratix | Altera Stratix (1st generation) |
| Logic Elements / Cells | 41,250 | — |
| Logic Array Blocks (LABs) | 4,125 | 4,125 |
| CLB Equivalents / Registers | 46,970 | — |
| User I/O Pins | 683 | — |
| パッケージ | BGA-956 (956-BBGA, FCBGA) | 956-ball FineLine BGA (FCBGA) |
| Package Size | 40 x 40 mm | — |
| Ball Pitch | 1.27 mm | 1.27 mm |
| Speed Grade | 6 (commercial, slowest) | C6 (commercial, mid-speed) |
| Core Supply Voltage | 1.5 V | — |
| 動作温度 | 0C to 85C | 0 °C to +85 °C (Commercial) |
| Logic Family | CMOS | — |
| 実装タイプ | Surface Mount | Surface Mount |
| Process Technology | 0.13 um CMOS | 0.13 µm CMOS |
| Embedded Memory | TriMatrix (M512, M4K, M-RAM blocks) | 3,423,744 bits (~3.4 Mbit) |
| DSP Blocks | Embedded multiplier blocks | — |
| PLLs | Multiple phase-locked loops | — |
| Lead-Free / RoHS | Per Altera/Intel datasheet | — |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 41,250 |
| Maximum User I/O | — | 683 |
| 電源電圧 | — | 1.425 V to 1.575 V (1.5 V nominal) |
| Package Dimensions | — | 40 mm x 40 mm |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Active Serial |
| MSLレベル | — | [DATA_NEEDED: MSL rating] |
| RoHS ステータス | — | [DATA_NEEDED: RoHS compliance] |