EP1S60F1020C6N vs EP1S60F1020 比較

詳細な並列比較: EP1S60F1020C6N メーカー: Intel および EP1S60F1020 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

Altera
EP1S60F1020 EP1S60F1020 - Stratix 57K LEs, 1020-BGA FPGA | Altera

EP1S60F1020 - Stratix 57K LEs, 1020-BGA FPGA | Altera

EP1S60F1020 ⚠ ラストタイムバイ

仕様比較

パラメータ EP1S60F1020C6N EP1S60F1020
ブランド Intel Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 Obsolete ラストバイ
在庫状況 In Stock In Stock
単価(USD) $195.00 $3,995.00
Series Stratix Stratix
Family Stratix (EP1S) Altera Stratix (EP1S)
Logic Elements (LEs) 57,120 57,120
Logic Cells 6,570 blocks (per chipdig datasheet summary) —
Embedded RAM (Total Bits) 5,215,104 bits —
Embedded Multipliers 773 (18x18) —
Maximum User I/O Pins Per datasheet, package-dependent (F1020 variant) —
Package Type 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch —
Logic Family / Process CMOS, 0.13 µm —
動作温度 0°C to +85°C (Commercial) —
電源電圧 Per datasheet (Stratix Device Handbook Vol. 1) —
Speed Grade C6 (mid-tier) —
Lead-Free / Pb-Free Yes (suffix 'N') —
RoHS ステータス Compliant (per 'N' suffix) [DATA_NEEDED: verify per part suffix]
実装タイプ Surface Mount (BGA) Surface Mount (BGA)
MSLレベル [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL rating]
Configuration JTAG / Passive Serial / Fast Passive Parallel via MSEL pins —
PLL Count 12 (per Stratix family datasheet) —
Memory Block Types TriMatrix (M512, M4K, M-RAM) —
Process Technology — 0.13 um CMOS
Logic Array Blocks (LABs) — 5,712
Total RAM Bits — 5,215,104
Embedded Multipliers (DSP Blocks) — [DATA_NEEDED: DSP block count]
User I/Os — 773
PLLs — [DATA_NEEDED: PLL count, nominally 12 for Stratix EP1S60]
パッケージ — 1020-BGA (FineLine FBGA)
Core Voltage — 1.5 V
Operating Temperature (base part) — Commercial (0C to +85C)
Speed Grade (base part) — [DATA_NEEDED: trailing suffix needed for explicit grade]
I/O Standard Support — LVDS, LVPECL, SSTL, HSTL, PCI/PCI-X
Configuration Memory — SRAM-based, requires external configuration device

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