EP1SGX25DF1020I6N vs EP1SGX25DF1020I5N 比較

詳細な並列比較: EP1SGX25DF1020I6N メーカー: Intel および EP1SGX25DF1020I5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

Intel
EP1SGX25DF1020I5N EP1SGX25DF1020I5N - Stratix GX FPGA 25K LEs, 1.5V, FC-FBGA-1020 | Intel

EP1SGX25DF1020I5N - Stratix GX FPGA 25K LEs, 1.5V, FC-FBGA-1020 | Intel

EP1SGX25DF1020I5N ⚠ ラストタイムバイ

仕様比較

パラメータ EP1SGX25DF1020I6N EP1SGX25DF1020I5N
ブランド Intel Intel
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 Obsolete ラストバイ
在庫状況 In Stock In Stock
単価(USD) $165.00 $985.00
Family Stratix GX —
Series EP1SGX25 —
Logic Elements 25,660 —
Configurable Logic Blocks (CLBs) 2,566 —
User I/Os 607 —
Maximum Operating Frequency [DATA_NEEDED: max internal clock frequency in MHz] —
Process Technology 130 nm CMOS 130 nm CMOS
Core Supply Voltage 1.425 V to 1.575 V (1.5 V nominal) 1.5 V
Multi-Gigabit Transceivers Integrated (up to 3.125 Gbps per channel) —
パッケージ 1020-ball FC-FBGA, 33 mm × 33 mm, 1.0 mm pitch —
実装タイプ Surface Mount (BGA) Surface Mount
Lead Finish Lead Free —
動作温度 0 °C to +85 °C (industrial) 0 °C to 85 °C (industrial)
MSLレベル [DATA_NEEDED: moisture sensitivity level] —
RoHS ステータス Compliant Compliant (per distributor data)
Memory Embedded TriMatrix memory blocks —
DSP Blocks Integrated DSP blocks for fixed/floating-point arithmetic —
Clock Management PLLs with dynamic phase alignment (DPA) —
Grade Identifier I6 (industrial, speed grade 6) —
Manufacturer Intel (formerly Altera) —
Logic Family — Stratix GX (FPGA)
Logic Elements / Cells — 25,660
Package Type — FC-FBGA (Flip-Chip FineLine BGA)
Pin / Ball Count — 1,020
Package Dimensions — 33 × 33 mm, 1.0 mm pitch
Transceiver Channels — Up to 20 CDR-based full-duplex channels
Transceiver Data Rate — 500 Mbps to 3.1875 Gbps per channel
Aggregate Serial Bandwidth — Up to 127.5 Gbps full-duplex
Hard IP Protocols — PCI Express, SerialLite II, XAUI, Serial RapidIO
Lead Free — Yes

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