EP1SGX25DF67216 vs EP1SGX25CF672C7 比較

詳細な並列比較: EP1SGX25DF67216 メーカー: Altera および EP1SGX25CF672C7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

仕様比較

パラメータ EP1SGX25DF67216 EP1SGX25CF672C7
ブランド Altera Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 Obsolete Obsolete
在庫状況 In Stock In Stock
単価(USD) $198.00 $340.00
Family Stratix GX Stratix® GX
Logic Elements 25,660 —
Total RAM Bits 1,944,576 1,944,576
Embedded Multipliers (18x18) [DATA_NEEDED: 18x18 multiplier count] —
Number of PLLs 4 —
Number of Transceiver Channels 8 (4 in each of 2 banks) —
Max Transceiver Data Rate 3.1875 Gbps per channel —
Min Transceiver Data Rate 500 Mbps —
Core Supply Voltage 1.5 V 1.5 V
Auxiliary Supply Voltage 3.3 V —
I/O Supply Voltage 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank) —
Maximum User I/O Pins [DATA_NEEDED: user I/O count for DF672 package] —
パッケージ 672-ball FineLine BGA (DF672) 672-ball FC-FBGA, 33 × 33 mm, 1.0 mm pitch
実装タイプ Surface Mount (BGA) Surface Mount
動作温度 Industrial, -40C to +100C (I-suffix family) 0 °C to 85 °C (commercial, C-grade)
On-Die Termination Yes, 100-ohm differential —
Pre-emphasis / Equalization Programmable (transmitter pre-emphasis; receiver adaptive equalization) —
Configuration Schemes Passive serial, fast passive parallel, JTAG, Altera enhanced configuration —
RoHS ステータス Lead-free / RoHS compliant (per Altera product family documentation) RoHS non-compliant (variant as listed); Pb-free / RoHS versions use "N" suffix
Logic Elements / Cells — 25,660
Logic Array Blocks (LABs) — 2,566
Maximum User I/O — 455
Number of I/Os — 455
Process Technology — 130 nm CMOS
Configuration Method — Passive Serial / Fast Passive Parallel / JTAG
Device Series — Stratix GX (SGX)
Lead-Free / Pb-Free — Lead-free package, RoHS status varies by suffix

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