EP1SGX25DF800C5N vs EP1SGX25CF672C7 比較
詳細な並列比較: EP1SGX25DF800C5N メーカー: Intel および EP1SGX25CF672C7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1SGX25DF800C5N | EP1SGX25CF672C7 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $158.00 | $340.00 |
| Family | Stratix GX | Stratix® GX |
| Device Logic Elements | 25,660 (typical) | — |
| Transceiver Channels | 8 (full-duplex) | — |
| Maximum Transceiver Data Rate | 3.1875 Gbps per channel | — |
| Process Technology | 130 nm | 130 nm CMOS |
| Supply Voltage (Core) | 1.5 V typical | — |
| パッケージ | FBGA-800 (FineLine BGA, 31x31 mm) | 672-ball FC-FBGA, 33 × 33 mm, 1.0 mm pitch |
| Speed Grade | C5 (commercial) | — |
| 動作温度 | 0C to +85C (commercial) | 0 °C to 85 °C (commercial, C-grade) |
| Lead-Free / RoHS Status | Lead-free (N suffix) | — |
| On-Chip Memory (TriMatrix) | Approx. 2 Mbits total | — |
| PLLs | Up to 40 (device-wide) | — |
| Embedded 8b/10b Encoder/Decoder | Yes (one per transceiver channel) | — |
| PCI Express Hard IP | x1, x4 endpoints supported | — |
| DSP Blocks | Embedded multiplier blocks (family-wide) | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| MSLレベル | [DATA_NEEDED: MSL Level] | — |
| Development Software | Quartus II (legacy) | — |
| Logic Elements / Cells | — | 25,660 |
| Logic Array Blocks (LABs) | — | 2,566 |
| Total RAM Bits | — | 1,944,576 |
| Maximum User I/O | — | 455 |
| Number of I/Os | — | 455 |
| Core Supply Voltage | — | 1.5 V |
| RoHS ステータス | — | RoHS non-compliant (variant as listed); Pb-free / RoHS versions use "N" suffix |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Device Series | — | Stratix GX (SGX) |
| Lead-Free / Pb-Free | — | Lead-free package, RoHS status varies by suffix |