EP1SGX25DF800I6N vs EP1SGX25DF800C5N 比較
詳細な並列比較: EP1SGX25DF800I6N メーカー: Intel および EP1SGX25DF800C5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EP1SGX25DF800I6N - Stratix GX FPGA, 25K LE, 20x 3.1875 Gbps Transceivers | Intel / Altera
EP1SGX25DF800I6N ⚠ ラストタイムバイ仕様比較
| パラメータ | EP1SGX25DF800I6N | EP1SGX25DF800C5N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価(USD) | $1,450.00 | $158.00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | [DATA_NEEDED: logic element count] | — |
| Transceiver Channels | 4 to 20 channels | 8 (full-duplex) |
| Maximum Transceiver Data Rate | 3.1875 Gbps per channel | 3.1875 Gbps per channel |
| CDR / SERDES | Embedded clock-data recovery and SERDES | — |
| Memory | TriMatrix memory, up to 2 Mbits | — |
| DSP Blocks | Up to 22 DSP blocks | Embedded multiplier blocks (family-wide) |
| Hard IP | PCI Express PHY, external memory interfaces (DDR, DDR-II, QDR-II, RLDRAM-II) | — |
| Source-Synchronous Channels | 8 channels | — |
| I/O Standards | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| パッケージ | 800-pin FineLine BGA (DF800) | FBGA-800 (FineLine BGA, 31x31 mm) |
| Speed Grade | -6 (production grade) | C5 (commercial) |
| Temperature Range | Industrial -40C to +100C | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| Protocol Support | Gigabit Ethernet, SONET/SDH, PCI Express, custom serial | — |
| Device Logic Elements | — | 25,660 (typical) |
| Process Technology | — | 130 nm |
| Supply Voltage (Core) | — | 1.5 V typical |
| 動作温度 | — | 0C to +85C (commercial) |
| Lead-Free / RoHS Status | — | Lead-free (N suffix) |
| On-Chip Memory (TriMatrix) | — | Approx. 2 Mbits total |
| PLLs | — | Up to 40 (device-wide) |
| Embedded 8b/10b Encoder/Decoder | — | Yes (one per transceiver channel) |
| PCI Express Hard IP | — | x1, x4 endpoints supported |
| 実装タイプ | — | Surface Mount (BGA) |
| MSLレベル | — | [DATA_NEEDED: MSL Level] |
| Development Software | — | Quartus II (legacy) |