EP1SGX25FF1020C5L vs EP1SGX25FF1020 比較

詳細な並列比較: EP1SGX25FF1020C5L メーカー: Altera および EP1SGX25FF1020 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

仕様比較

パラメータ EP1SGX25FF1020C5L EP1SGX25FF1020
ブランド Altera Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 Obsolete Obsolete
在庫状況 In Stock In Stock
単価(USD) $105.00 $295.00
Family Stratix GX Stratix GX
Logic Elements 25,660 cells —
Process Technology 130 nm CMOS 130 nm CMOS
Package Type FC-FBGA (Flip-Chip Fine-pitch Ball Grid Array) —
ピン数 1020 balls —
Core Voltage 1.5 V —
Speed Grade C5 (slowest tier) —
Maximum Transceiver Data Rate 3.125 Gbps —
Maximum Operating Frequency 5000 MHz (internal reference) —
実装タイプ Surface Mount Surface Mount (BGA)
動作温度 [DATA_NEEDED: operating temperature range] -40C to +85C (industrial variant) / 0C to +85C (commercial variant)
Memory Architecture TriMatrix (M512/M4K/M-RAM blocks) —
I/O Standards Supported LVDS, LVTTL, LVCMOS, HSTL, SSTL —
Configuration Scheme Active serial (EPCS), passive serial, JTAG —
DSP Blocks [DATA_NEEDED: DSP block count] Embedded dedicated multipliers
RoHS ステータス [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance status]
Logic Elements (LE) — 25,660
Configurable Logic Blocks (CLB) — 2,566
Embedded Memory (bits) — 1,944,576
Logic Cells (per FPGAkey) — 25,660
Combinatorial Delay (Tpd) — 7.49 ns (per Microchip USA datasheet summary)
Operating Frequency (max) — [DATA_NEEDED: max internal operating frequency]
パッケージ — 1020-ball FCBGA (PBGA, 1.00 mm pitch)
Pin/Package Count — 1020
電源電圧 — [DATA_NEEDED: core VCC voltage]
Serial Transceivers — Embedded SERDES (multi-gigabit, protocol-dependent)
PLL / Clock Management — Embedded PLLs
Configuration Method — SRAM-based, configuration via JTAG / passive serial / fast passive parallel

データシート&リソース

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