EP1SGX25FF1020I7 vs EP1SGX25FF1020C6 比較

詳細な並列比較: EP1SGX25FF1020I7 メーカー: Altera および EP1SGX25FF1020C6 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

Altera

EP1SGX25FF1020I7 - Stratix GX FPGA 25,660 Cells, 1.5V, FC-FBGA-1020 | Altera / Intel

EP1SGX25FF1020I7 Obsolete

Intel

EP1SGX25FF1020C6 Obsolete

パラメータ	EP1SGX25FF1020I7	EP1SGX25FF1020C6
ブランド	Altera	Intel
カテゴリ	FPGA & CPLD	FPGA & CPLD
ライフサイクル状態	Obsolete	Obsolete
在庫状況	In Stock	In Stock
単価（USD）	$210.00	$135.00
Family	Stratix GX	Stratix GX
Series	EP1SGX25	Stratix GX
Logic Cells	25,660	—
Configurable Logic Blocks (CLBs)	2,566	—
Process Technology	130 nm CMOS	—
Core Supply Voltage	1.5 V	1.5 V
パッケージ	FC-FBGA-1020 (Flip-Chip Fine-pitch BGA)	—
Number of Terminals / Balls	1020	—
Terminal Form	Ball	—
Temperature Grade (suffix 'I')	Industrial	—
Speed Grade	7 (highest production grade)	C6
Terminal Pitch	[DATA_NEEDED: terminal pitch]	—
Combinatorial Delay per CLB	9.48 ns (per Microchip USA listing)	—
Combinatorial Delay Variant	[DATA_NEEDED: tPD per CLB variant speed grade]	—
Maximum Internal Clock Frequency	[DATA_NEEDED: max Fmax in MHz per speed grade]	—
Embedded Transceivers	Yes (Stratix GX feature)	—
Configuration Method	SRAM-based (volatile, requires configuration at power-up)	—
実装タイプ	Surface Mount (FC-FBGA)	Surface Mount
MSLレベル	[DATA_NEEDED: MSL level]	—
RoHS ステータス	[DATA_NEEDED: RoHS compliance]	Non-Compliant (legacy Altera era)
Logic Family	—	CMOS
Logic Elements / Cells	—	25,660
Number of LABs	—	2,566
Total Memory Bits	—	1,944,576 (1.94 Mbit, TriMatrix)
User I/O Count	—	607
ピン数	—	1020
Package Type	—	FBGA-1020 (FC-FBGA)
Package Dimensions	—	33 x 33 mm
Ball Pitch	—	1.0 mm
動作温度	—	0 °C to 85 °C (Commercial)
Lead Free	—	Yes