EP1SGX40F1020 vs EP1SGX40FF1020C7 比較
詳細な並列比較: EP1SGX40F1020 メーカー: Altera および EP1SGX40FF1020C7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1SGX40F1020 | EP1SGX40FF1020C7 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $102.10 | $750.00 |
| Family | Stratix GX | Stratix GX (EP1SGX40) |
| Logic Elements | 41,250 | — |
| Embedded Memory Bits | 3,423,744 | — |
| Total RAM Bits | 3,423,744 | — |
| User I/O Pins | 624 | 624 |
| Number of LABs/CLBs | 4125 | — |
| Number of Transceivers | 20 | — |
| Transceiver Data Rate | 600 Mbps to 3.1875 Gbps | — |
| パッケージ | 1020-BBGA (FineLine BGA) | 1020-ball FC-FBGA (S-PBGA-B1020) |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度範囲 | [DATA_NEEDED: industrial/commercial grade] | — |
| 電源電圧 | [DATA_NEEDED: core and I/O voltage] | — |
| Configuration Mode | SRAM-based LUT | — |
| JTAG Boundary Scan | Yes | — |
| RoHS ステータス | [DATA_NEEDED: confirm from manufacturer page] | Compliant |
| Series | — | Stratix GX |
| Logic Elements (LE) | — | 41,250 |
| Configurable Logic Blocks (CLB) | — | 4,125 |
| Embedded Memory (bits) | — | 3,423,744 |
| Number of Logic Array Blocks (LAB) | — | 4,125 |
| Number of I/O Banks | — | 12 |
| Core Supply Voltage (VCCINT) | — | 1.425 V to 1.575 V (nominal 1.5 V) |
| Speed Grade | — | 7 (-7, mid-speed) |
| Process Technology | — | CMOS |
| 動作温度 | — | 0 °C to 85 °C (commercial) |
| Package Dimensions | — | 33 mm × 33 mm |
| Ball Pitch | — | 1.00 mm |
| Configuration Modes | — | PS, PPS, PPA, JTAG, AS |
| DSP Blocks (9-bit) | — | 176 |
| Transceiver Channels | — | 20 full-duplex 3.1875 Gbps + 14 dedicated full-duplex 1.25 Gbps |
| PLLs | — | 8 enhanced + per-transceiver PLLs |