EP1SGX40GF800C5N vs EP1SGX40GF800I7 比較
詳細な並列比較: EP1SGX40GF800C5N メーカー: Intel および EP1SGX40GF800I7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1SGX40GF800C5N | EP1SGX40GF800I7 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $198.75 | $1,325.00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 41,250 | — |
| Total RAM Bits | 3,432,192 (3.4 Mbit) | — |
| DSP Blocks | 14 | — |
| Embedded Multipliers (9-bit equivalent) | 56 | — |
| Transceiver Channels | 20 (up to 3.1875 Gbps per channel) | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O count for 780-pin BGA] | — |
| PLLs | 24 | — |
| Clock Networks | 8 phase-locked | — |
| パッケージ | 780-pin FineLine BGA | 800-ball FineLine BGA (GF) |
| Speed Grade | -5 (slower than -6/-7) | -7 |
| 動作温度 | Commercial (0C to +85C) | -40C to +100C (industrial, I grade) |
| Core Voltage | 1.5 V | — |
| Process Technology | 0.13 µm SRAM | — |
| Configuration Method | EPC enhanced configuration devices or JTAG | Enhanced configuration device / Passive serial / JTAG |
| RoHS ステータス | [DATA_NEEDED: explicit RoHS statement for this specific MPN] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free finish] | [DATA_NEEDED: lead-free status] |
| Series | — | Stratix GX FPGA |
| Logic Elements (LE) | — | 41,250 |
| Embedded Memory | — | 3,423,744 bits |
| Embedded Multipliers (18x18) | — | 624 |
| High-Speed Transceivers (SERDES) | — | 20 channels, up to 3.125 Gbps |
| PLL Count | — | 12 (logic + transceiver) |
| User I/O Banks | — | [DATA_NEEDED: number of user I/O banks and pins] |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O count] |
| Supply Voltage Core | — | [DATA_NEEDED: VCCINT nominal] |
| MSLレベル | — | [DATA_NEEDED: moisture sensitivity level] |
| Transceiver Protocols Supported | — | PCI Express, Gigabit Ethernet, XAUI, Serial RapidIO, Fibre Channel |